From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dhinakaran Pandiyan <dhinakaran.pandiya@intel.com>
Subject: [PATCH v5 2/3] drm/i915: Add _TRANS2()
Date: Sat, 20 Apr 2019 13:55:28 -0700 [thread overview]
Message-ID: <20190420205529.20624-2-jose.souza@intel.com> (raw)
In-Reply-To: <20190420205529.20624-1-jose.souza@intel.com>
A new macro that is going to be added in a further patch will need to
adjust the offset returned by _MMIO_TRANS2(), so here adding
_TRANS2() and moving most of the implementation of _MMIO_TRANS2() to
it and while at it taking the opportunity to rename pipe to trans.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiya@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiya@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index b74824f0b5b1..31163415479d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -250,9 +250,10 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
#define _MMIO_PIPE2(pipe, reg) _MMIO(INTEL_INFO(dev_priv)->pipe_offsets[pipe] - \
INTEL_INFO(dev_priv)->pipe_offsets[PIPE_A] + (reg) + \
DISPLAY_MMIO_BASE(dev_priv))
-#define _MMIO_TRANS2(pipe, reg) _MMIO(INTEL_INFO(dev_priv)->trans_offsets[(pipe)] - \
- INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \
- DISPLAY_MMIO_BASE(dev_priv))
+#define _TRANS2(tran, reg) (INTEL_INFO(dev_priv)->trans_offsets[(tran)] - \
+ INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \
+ DISPLAY_MMIO_BASE(dev_priv))
+#define _MMIO_TRANS2(tran, reg) _MMIO(_TRANS2(tran, reg))
#define _CURSOR2(pipe, reg) _MMIO(INTEL_INFO(dev_priv)->cursor_offsets[(pipe)] - \
INTEL_INFO(dev_priv)->cursor_offsets[PIPE_A] + (reg) + \
DISPLAY_MMIO_BASE(dev_priv))
--
2.21.0
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next prev parent reply other threads:[~2019-04-20 20:55 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-20 20:55 [PATCH v5 1/3] drm/i915/bdw+: Move misc display IRQ handling to it own function José Roberto de Souza
2019-04-20 20:55 ` José Roberto de Souza [this message]
2019-04-20 20:55 ` [PATCH v5 3/3] drm/i915: Make PSR registers relative to transcoders José Roberto de Souza
2019-06-15 4:27 ` Dhinakaran Pandiyan
2019-06-19 0:27 ` Souza, Jose
2019-04-20 21:41 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/3] drm/i915/bdw+: Move misc display IRQ handling to it own function Patchwork
2019-04-20 21:43 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-04-20 22:02 ` ✓ Fi.CI.BAT: success " Patchwork
2019-04-20 23:13 ` ✓ Fi.CI.IGT: " Patchwork
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