From: Shashank Sharma <shashank.sharma@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH v3 0/4] Enable Multi-segmented-gamma for ICL
Date: Tue, 7 May 2019 19:26:40 +0530 [thread overview]
Message-ID: <20190507135644.23882-1-shashank.sharma@intel.com> (raw)
This patch series enables programming of Multi-segmented-gamma
palette for ICL.
Shashank Sharma (3):
drm/i915: Change gamma/degamma_lut_size data type to u32
drm/i915: Rename ivb_load_lut_10_max
drm/i915/icl: Add Multi-segmented gamma support
Uma Shankar (1):
drm/i915/icl: Add register definitions for Multi Segmented gamma
drivers/gpu/drm/i915/i915_pci.c | 2 +-
drivers/gpu/drm/i915/i915_reg.h | 19 ++-
drivers/gpu/drm/i915/intel_color.c | 141 +++++++++++++++++++++--
drivers/gpu/drm/i915/intel_device_info.h | 4 +-
4 files changed, 151 insertions(+), 15 deletions(-)
--
2.17.1
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next reply other threads:[~2019-05-07 13:59 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-07 13:56 Shashank Sharma [this message]
2019-05-07 13:56 ` [PATCH v3 1/4] drm/i915: Change gamma/degamma_lut_size data type to u32 Shashank Sharma
2019-05-08 13:35 ` Shankar, Uma
2019-05-07 13:56 ` [PATCH v3 2/4] drm/i915/icl: Add register definitions for Multi Segmented gamma Shashank Sharma
2019-05-07 13:56 ` [PATCH v3 3/4] drm/i915: Rename ivb_load_lut_10_max Shashank Sharma
2019-05-07 13:56 ` [PATCH v3 4/4] drm/i915/icl: Add Multi-segmented gamma support Shashank Sharma
2019-05-07 14:27 ` Ville Syrjälä
2019-05-08 13:05 ` Sharma, Shashank
2019-05-08 20:03 ` Sharma, Shashank
2019-05-07 16:05 ` ✓ Fi.CI.BAT: success for Enable Multi-segmented-gamma for ICL (rev2) Patchwork
2019-05-07 22:08 ` ✓ Fi.CI.IGT: " Patchwork
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