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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Intel-gfx@lists.freedesktop.org
Subject: [PATCH 03/21] drm/i915: Make Gen6/7 RING_FAULT_REG access engine centric
Date: Thu,  6 Jun 2019 10:36:21 +0100	[thread overview]
Message-ID: <20190606093639.9372-4-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <20190606093639.9372-1-tvrtko.ursulin@linux.intel.com>

From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Similar to earlier conversions, eliminate the implicit dev_priv by
introducing some helpers which take the engine parameter (since the
register itself is per engine).

Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine.h | 18 ++++++++++++++++++
 drivers/gpu/drm/i915/gt/intel_reset.c  |  6 ++----
 drivers/gpu/drm/i915/i915_gem_gtt.c    |  2 +-
 drivers/gpu/drm/i915/i915_gpu_error.c  |  2 +-
 4 files changed, 22 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine.h b/drivers/gpu/drm/i915/gt/intel_engine.h
index 1c0db151f0b1..a12b8ead4463 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine.h
@@ -68,6 +68,24 @@ struct drm_printer;
 #define ENGINE_WRITE(...)	__ENGINE_WRITE_OP(write, __VA_ARGS__)
 #define ENGINE_WRITE_FW(...)	__ENGINE_WRITE_OP(write_fw, __VA_ARGS__)
 
+#define GEN6_RING_FAULT_REG_READ(engine__) \
+	intel_uncore_read((engine__)->uncore, RING_FAULT_REG(engine__))
+
+#define GEN6_RING_FAULT_REG_POSTING_READ(engine__) \
+	intel_uncore_posting_read((engine__)->uncore, RING_FAULT_REG(engine__))
+
+#define GEN6_RING_FAULT_REG_RMW(engine__, clear__, set__) \
+({ \
+	u32 __val; \
+\
+	__val = intel_uncore_read((engine__)->uncore, \
+				  RING_FAULT_REG(engine__)); \
+	__val &= ~clear__; \
+	__val |= set__; \
+	intel_uncore_write((engine__)->uncore, RING_FAULT_REG(engine__), \
+			   __val); \
+})
+
 /* seqno size is actually only a uint32, but since we plan to use MI_FLUSH_DW to
  * do the writes, and that must have qw aligned offsets, simply pretend it's 8b.
  */
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 7bfb76eb0291..de53927c583f 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1195,10 +1195,8 @@ void i915_clear_error_registers(struct drm_i915_private *i915,
 		enum intel_engine_id id;
 
 		for_each_engine_masked(engine, i915, engine_mask, id) {
-			rmw_clear(uncore,
-				  RING_FAULT_REG(engine), RING_FAULT_VALID);
-			intel_uncore_posting_read(uncore,
-						  RING_FAULT_REG(engine));
+			GEN6_RING_FAULT_REG_RMW(engine, RING_FAULT_VALID, 0);
+			GEN6_RING_FAULT_REG_POSTING_READ(engine);
 		}
 	}
 }
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5ee3790f2895..84104e9cc507 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2305,7 +2305,7 @@ static void gen6_check_faults(struct drm_i915_private *dev_priv)
 	u32 fault;
 
 	for_each_engine(engine, dev_priv, id) {
-		fault = I915_READ(RING_FAULT_REG(engine));
+		fault = GEN6_RING_FAULT_REG_READ(engine);
 		if (fault & RING_FAULT_VALID) {
 			DRM_DEBUG_DRIVER("Unexpected fault\n"
 					 "\tAddr: 0x%08lx\n"
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 707811256501..2f85de034d8f 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1149,7 +1149,7 @@ static void error_record_engine_registers(struct i915_gpu_state *error,
 		if (INTEL_GEN(dev_priv) >= 8)
 			ee->fault_reg = I915_READ(GEN8_RING_FAULT_REG);
 		else
-			ee->fault_reg = I915_READ(RING_FAULT_REG(engine));
+			ee->fault_reg = GEN6_RING_FAULT_REG_READ(engine);
 	}
 
 	if (INTEL_GEN(dev_priv) >= 4) {
-- 
2.20.1

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  parent reply	other threads:[~2019-06-06  9:36 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-06  9:36 [PATCH 00/21] Implicit dev_priv removal Tvrtko Ursulin
2019-06-06  9:36 ` [PATCH 01/21] drm/i915: Reset only affected engines when handling error capture Tvrtko Ursulin
2019-06-06  9:44   ` Chris Wilson
2019-06-06  9:49     ` Tvrtko Ursulin
2019-06-06  9:36 ` [PATCH 02/21] drm/i915: Tidy engine mask types in hangcheck Tvrtko Ursulin
2019-06-06  9:45   ` Chris Wilson
2019-06-06  9:36 ` Tvrtko Ursulin [this message]
2019-06-06  9:47   ` [PATCH 03/21] drm/i915: Make Gen6/7 RING_FAULT_REG access engine centric Chris Wilson
2019-06-06  9:36 ` [PATCH 04/21] drm/i915: Extract engine fault reset to a helper Tvrtko Ursulin
2019-06-06  9:48   ` Chris Wilson
2019-06-06  9:36 ` [PATCH 05/21] drm/i915: Make i915_clear_error_registers take uncore Tvrtko Ursulin
2019-06-06  9:50   ` Chris Wilson
2019-06-06  9:51     ` Chris Wilson
2019-06-06 10:29     ` Tvrtko Ursulin
2019-06-06  9:36 ` [PATCH 06/21] drm/i915: Convert some more bits to use engine mmio accessors Tvrtko Ursulin
2019-06-06  9:53   ` Chris Wilson
2019-06-06  9:36 ` [PATCH 07/21] drm/i915: Make read_subslice_reg take uncore Tvrtko Ursulin
2019-06-06  9:54   ` Chris Wilson
2019-06-06  9:36 ` [PATCH 08/21] drm/i915: Tidy intel_execlists_submission_init Tvrtko Ursulin
2019-06-06  9:55   ` Chris Wilson
2019-06-06  9:36 ` [PATCH 09/21] drm/i915: Make i915_check_and_clear_faults take uncore Tvrtko Ursulin
2019-06-06  9:57   ` Chris Wilson
2019-06-06 10:31     ` Tvrtko Ursulin
2019-06-06  9:36 ` [PATCH 10/21] drm/i915: Move scheduler caps init to i915_gem_init Tvrtko Ursulin
2019-06-06  9:59   ` Chris Wilson
2019-06-06  9:36 ` [PATCH 11/21] drm/i915: Remove impossible path from i915_gem_init_swizzling Tvrtko Ursulin
2019-06-06 10:01   ` Chris Wilson
2019-06-06 10:23     ` Tvrtko Ursulin
2019-06-06  9:36 ` [PATCH 12/21] drm/i915: Convert i915_gem_init_swizzling to uncore Tvrtko Ursulin
2019-06-06  9:36 ` [PATCH 13/21] drm/i915: Convert init_unused_rings " Tvrtko Ursulin
2019-06-06  9:36 ` [PATCH 14/21] drm/i915: Convert gt workarounds " Tvrtko Ursulin
2019-06-06  9:36 ` [PATCH 15/21] drm/i915: Convert intel_mocs_init_l3cc_table " Tvrtko Ursulin
2019-06-06  9:36 ` [PATCH 16/21] drm/i915: Convert i915_ppgtt_init_hw " Tvrtko Ursulin
2019-06-06  9:36 ` [PATCH 17/21] drm/i915: Consolidate some open coded mmio rmw Tvrtko Ursulin
2019-06-06 13:46   ` Rodrigo Vivi
2019-06-06  9:36 ` [PATCH 18/21] drm/i915: Convert i915_gem_init_hw to uncore Tvrtko Ursulin
2019-06-06  9:36 ` [PATCH 19/21] drm/i915: Convert intel_vgt_(de)balloon " Tvrtko Ursulin
2019-06-06  9:36 ` [PATCH 20/21] drm/i915: Make GuC GGTT reservation work on ggtt Tvrtko Ursulin
2019-06-06 11:58   ` Michal Wajdeczko
2019-06-06 12:23     ` Tvrtko Ursulin
2019-06-06 13:21       ` Michal Wajdeczko
2019-06-06 13:44   ` Rodrigo Vivi
2019-06-06  9:36 ` [PATCH 21/21] drm/i915: Unexport i915_gem_init/fini_aliasing_ppgtt Tvrtko Ursulin
2019-06-06 13:39   ` Rodrigo Vivi
2019-06-06 10:05 ` [PATCH 00/21] Implicit dev_priv removal Chris Wilson
2019-06-06 10:35   ` Tvrtko Ursulin
2019-06-06 10:10 ` ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2019-06-06 10:19 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-06-06 12:42 ` ✓ Fi.CI.BAT: success " Patchwork
2019-06-08 15:11 ` ✗ Fi.CI.IGT: failure " Patchwork

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