From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Intel-gfx@lists.freedesktop.org
Subject: [RFC 28/31] drm/i915: Save trip via top-level i915 in a few more places
Date: Fri, 14 Jun 2019 16:17:28 +0100 [thread overview]
Message-ID: <20190614151731.17608-29-tvrtko.ursulin@linux.intel.com> (raw)
In-Reply-To: <20190614151731.17608-1-tvrtko.ursulin@linux.intel.com>
From: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
For gt related operations it makes more logical sense to stay in the realm
of gt instead of dereferencing via driver i915.
This patch handles a few of the easy ones with work requiring more
refactoring still outstanding.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
---
drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 3 +--
drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c | 3 +--
drivers/gpu/drm/i915/gt/intel_engine_cs.c | 2 +-
drivers/gpu/drm/i915/gt/intel_lrc.c | 4 ++--
drivers/gpu/drm/i915/gt/intel_ringbuffer.c | 2 +-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 2 +-
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 8 ++++----
drivers/gpu/drm/i915/gt/selftest_workarounds.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 4 ++--
drivers/gpu/drm/i915/i915_gem_render_state.c | 2 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
11 files changed, 16 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
index 5aa52ed514b7..f197a55dd32a 100644
--- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
@@ -1039,8 +1039,7 @@ static int __igt_write_huge(struct i915_gem_context *ctx,
u64 size, u64 offset,
u32 dword, u32 val)
{
- struct drm_i915_private *i915 = to_i915(obj->base.dev);
- struct i915_address_space *vm = ctx->vm ?: &i915->ggtt.vm;
+ struct i915_address_space *vm = ctx->vm ?: &engine->gt->ggtt->vm;
unsigned int flags = PIN_USER | PIN_OFFSET_FIXED;
struct i915_vma *vma;
int err;
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
index 9e2878a59023..496c9c353aee 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_context.c
@@ -241,8 +241,7 @@ static int gpu_fill(struct drm_i915_gem_object *obj,
struct intel_engine_cs *engine,
unsigned int dw)
{
- struct drm_i915_private *i915 = to_i915(obj->base.dev);
- struct i915_address_space *vm = ctx->vm ?: &i915->ggtt.vm;
+ struct i915_address_space *vm = ctx->vm ?: &engine->gt->ggtt->vm;
struct i915_request *rq;
struct i915_vma *vma;
struct i915_vma *batch;
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index c2d87c50dd6f..ab9c5141ee0c 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -580,7 +580,7 @@ static int init_status_page(struct intel_engine_cs *engine)
i915_gem_object_set_cache_coherency(obj, I915_CACHE_LLC);
- vma = i915_vma_instance(obj, &engine->i915->ggtt.vm, NULL);
+ vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL);
if (IS_ERR(vma)) {
ret = PTR_ERR(vma);
goto err;
diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c
index b8f5592da18f..68c6f11a03c5 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1926,7 +1926,7 @@ static int lrc_setup_wa_ctx(struct intel_engine_cs *engine)
if (IS_ERR(obj))
return PTR_ERR(obj);
- vma = i915_vma_instance(obj, &engine->i915->ggtt.vm, NULL);
+ vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto err;
@@ -3017,7 +3017,7 @@ static int execlists_context_deferred_alloc(struct intel_context *ce,
if (IS_ERR(ctx_obj))
return PTR_ERR(ctx_obj);
- vma = i915_vma_instance(ctx_obj, &engine->i915->ggtt.vm, NULL);
+ vma = i915_vma_instance(ctx_obj, &engine->gt->ggtt->vm, NULL);
if (IS_ERR(vma)) {
ret = PTR_ERR(vma);
goto error_deref_obj;
diff --git a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
index 894122d23dda..f74872cca686 100644
--- a/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/gt/intel_ringbuffer.c
@@ -1444,7 +1444,7 @@ alloc_context_vma(struct intel_engine_cs *engine)
i915_gem_object_unpin_map(obj);
}
- vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
+ vma = i915_vma_instance(obj, &engine->gt->ggtt->vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto err_obj;
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 0b3308e39a17..c9e929285bc8 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -1369,7 +1369,7 @@ static int engine_wa_list_verify(struct intel_context *ce,
if (!wal->count)
return 0;
- vma = create_scratch(&ce->engine->i915->ggtt.vm, wal->count);
+ vma = create_scratch(&ce->engine->gt->ggtt->vm, wal->count);
if (IS_ERR(vma))
return PTR_ERR(vma);
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index e5edad74257e..c6b2737cecca 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -130,7 +130,7 @@ static struct i915_request *
hang_create_request(struct hang *h, struct intel_engine_cs *engine)
{
struct drm_i915_private *i915 = h->i915;
- struct i915_address_space *vm = h->ctx->vm ?: &i915->ggtt.vm;
+ struct i915_address_space *vm = h->ctx->vm ?: &engine->gt->ggtt->vm;
struct i915_request *rq = NULL;
struct i915_vma *hws, *vma;
unsigned int flags;
@@ -143,12 +143,12 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
struct drm_i915_gem_object *obj;
void *vaddr;
- obj = i915_gem_object_create_internal(h->i915, PAGE_SIZE);
+ obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
if (IS_ERR(obj))
return ERR_CAST(obj);
vaddr = i915_gem_object_pin_map(obj,
- i915_coherent_map_type(h->i915));
+ i915_coherent_map_type(i915));
if (IS_ERR(vaddr)) {
i915_gem_object_put(obj);
return ERR_CAST(vaddr);
@@ -255,7 +255,7 @@ hang_create_request(struct hang *h, struct intel_engine_cs *engine)
}
flags = 0;
- if (INTEL_GEN(vm->i915) <= 5)
+ if (INTEL_GEN(i915) <= 5)
flags |= I915_DISPATCH_SECURE;
err = rq->engine->emit_bb_start(rq, vma->node.start, PAGE_SIZE, flags);
diff --git a/drivers/gpu/drm/i915/gt/selftest_workarounds.c b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
index f9813d21fe9d..f9982da4a40f 100644
--- a/drivers/gpu/drm/i915/gt/selftest_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/selftest_workarounds.c
@@ -103,7 +103,7 @@ read_nonprivs(struct i915_gem_context *ctx, struct intel_engine_cs *engine)
i915_gem_object_flush_map(result);
i915_gem_object_unpin_map(result);
- vma = i915_vma_instance(result, &engine->i915->ggtt.vm, NULL);
+ vma = i915_vma_instance(result, &engine->gt->ggtt->vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto err_obj;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f97f30031d47..35be61aad1e5 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1873,7 +1873,7 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
if (flush) {
mark_tlbs_dirty(&ppgtt->base);
- gen6_ggtt_invalidate(&vm->i915->ggtt);
+ gen6_ggtt_invalidate(vm->gt->ggtt);
}
intel_runtime_pm_put(vm->i915, wakeref);
@@ -2059,7 +2059,7 @@ static const struct i915_vma_ops pd_vma_ops = {
static struct i915_vma *pd_vma_create(struct gen6_ppgtt *ppgtt, int size)
{
struct drm_i915_private *i915 = ppgtt->base.vm.i915;
- struct i915_ggtt *ggtt = &i915->ggtt;
+ struct i915_ggtt *ggtt = ppgtt->base.vm.gt->ggtt;
struct i915_vma *vma;
GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 4ee032072d4f..6bda08c1e8d7 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -194,7 +194,7 @@ int i915_gem_render_state_emit(struct i915_request *rq)
if (IS_ERR(so.obj))
return PTR_ERR(so.obj);
- so.vma = i915_vma_instance(so.obj, &engine->i915->ggtt.vm, NULL);
+ so.vma = i915_vma_instance(so.obj, &engine->gt->ggtt->vm, NULL);
if (IS_ERR(so.vma)) {
err = PTR_ERR(so.vma);
goto err_obj;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 26c9c0595bdf..d0f9b4aba241 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1408,12 +1408,12 @@ capture_object(struct drm_i915_private *dev_priv,
static void gem_record_rings(struct i915_gpu_state *error)
{
struct drm_i915_private *i915 = error->i915;
- struct i915_ggtt *ggtt = &i915->ggtt;
int i;
for (i = 0; i < I915_NUM_ENGINES; i++) {
struct intel_engine_cs *engine = i915->engine[i];
struct drm_i915_error_engine *ee = &error->engine[i];
+ struct i915_ggtt *ggtt = engine->gt->ggtt;
struct i915_request *request;
ee->engine_id = -1;
--
2.20.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-06-14 15:18 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-14 15:17 [RFC v4 00/31] Implicit dev_priv removal and GT compartmentalization Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 01/31] drm/i915: Convert intel_vgt_(de)balloon to uncore Tvrtko Ursulin
2019-06-14 17:18 ` Michal Wajdeczko
2019-06-14 17:43 ` Chris Wilson
2019-06-17 8:30 ` Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 02/31] drm/i915: Introduce struct intel_gt as replacement for anonymous i915->gt Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 03/31] drm/i915: Move intel_gt initialization to a separate file Tvrtko Ursulin
2019-06-14 15:32 ` Rodrigo Vivi
2019-06-14 16:13 ` Chris Wilson
2019-06-14 16:14 ` Chris Wilson
2019-06-14 16:16 ` Chris Wilson
2019-06-14 15:17 ` [RFC 04/31] drm/i915: Store some backpointers in struct intel_gt Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 05/31] drm/i915: Make i915_check_and_clear_faults take intel_gt Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 06/31] drm/i915: Convert i915_gem_init_swizzling to intel_gt Tvrtko Ursulin
2019-06-14 15:25 ` Rodrigo Vivi
2019-06-14 15:36 ` Tvrtko Ursulin
2019-06-14 16:16 ` Rodrigo Vivi
2019-06-14 16:21 ` Tvrtko Ursulin
2019-06-14 17:20 ` Rodrigo Vivi
2019-06-14 17:05 ` Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 07/31] drm/i915: Convert init_unused_rings " Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 08/31] drm/i915: Convert gt workarounds " Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 09/31] drm/i915: Store backpointer to intel_gt in the engine Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 10/31] drm/i915: Convert intel_mocs_init_l3cc_table to intel_gt Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 11/31] drm/i915: Convert i915_ppgtt_init_hw " Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 12/31] drm/i915: Consolidate some open coded mmio rmw Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 13/31] drm/i915: Convert i915_gem_init_hw to intel_gt Tvrtko Ursulin
2019-06-14 15:50 ` Rodrigo Vivi
2019-06-14 15:17 ` [RFC 14/31] drm/i915: Move intel_engines_resume into common init Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 15/31] drm/i915: Stop using I915_READ/WRITE in intel_wopcm_init_hw Tvrtko Ursulin
2019-06-14 15:52 ` Rodrigo Vivi
2019-06-14 15:17 ` [RFC 16/31] drm/i915: Compartmentalize i915_ggtt_probe_hw Tvrtko Ursulin
2019-06-14 15:59 ` Rodrigo Vivi
2019-06-14 15:17 ` [RFC 17/31] drm/i915: Compartmentalize i915_ggtt_init_hw Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 18/31] drm/i915: Make ggtt invalidation work on ggtt Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 19/31] drm/i915: Store intel_gt backpointer in vm Tvrtko Ursulin
2019-06-14 17:34 ` Rodrigo Vivi
2019-06-14 15:17 ` [RFC 20/31] drm/i915: Compartmentalize i915_gem_suspend/restore_gtt_mappings Tvrtko Ursulin
2019-06-14 16:19 ` Chris Wilson
2019-06-14 16:22 ` Tvrtko Ursulin
2019-06-14 17:52 ` Rodrigo Vivi
2019-06-14 15:17 ` [RFC 21/31] drm/i915: Convert i915_gem_flush_ggtt_writes to intel_gt Tvrtko Ursulin
2019-06-14 16:17 ` Tvrtko Ursulin
2019-06-14 16:24 ` Chris Wilson
2019-06-14 15:17 ` [RFC 22/31] drm/i915: Move i915_gem_chipset_flush " Tvrtko Ursulin
2019-06-14 16:26 ` Chris Wilson
2019-06-14 16:30 ` Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 23/31] drm/i915: Compartmentalize timeline_init/park/fini Tvrtko Ursulin
2019-06-14 16:28 ` Chris Wilson
2019-06-14 15:17 ` [RFC 24/31] drm/i915: Compartmentalize i915_ggtt_cleanup_hw Tvrtko Ursulin
2019-06-14 16:30 ` Chris Wilson
2019-06-14 15:17 ` [RFC 25/31] drm/i915: Compartmentalize i915_gem_init_ggtt Tvrtko Ursulin
2019-06-14 16:32 ` Chris Wilson
2019-06-14 16:38 ` Tvrtko Ursulin
2019-06-14 15:17 ` [RFC 26/31] drm/i915: Store ggtt pointer in intel_gt Tvrtko Ursulin
2019-06-14 17:40 ` Rodrigo Vivi
2019-06-14 15:17 ` [RFC 27/31] drm/i915: Compartmentalize ring buffer creation Tvrtko Ursulin
2019-06-14 16:34 ` Chris Wilson
2019-06-14 15:17 ` Tvrtko Ursulin [this message]
2019-06-14 16:36 ` [RFC 28/31] drm/i915: Save trip via top-level i915 in a few more places Chris Wilson
2019-06-14 15:17 ` [RFC 29/31] drm/i915: Make timelines gt centric Tvrtko Ursulin
2019-06-14 16:37 ` Chris Wilson
2019-06-14 15:17 ` [RFC 30/31] drm/i915: Rename i915_timeline to intel_timeline and move under gt Tvrtko Ursulin
2019-06-14 16:38 ` Chris Wilson
2019-06-14 15:17 ` [RFC 31/31] drm/i915: Eliminate dual personality of i915_scratch_offset Tvrtko Ursulin
2019-06-14 16:40 ` Chris Wilson
2019-06-14 16:46 ` Tvrtko Ursulin
2019-06-14 15:29 ` [RFC v4 00/31] Implicit dev_priv removal and GT compartmentalization Rodrigo Vivi
2019-06-14 15:48 ` ✗ Fi.CI.BAT: failure for Implicit dev_priv removal and GT compartmentalization (rev6) Patchwork
2019-06-14 16:54 ` ✗ Fi.CI.BAT: failure for Implicit dev_priv removal and GT compartmentalization (rev7) Patchwork
2019-06-14 17:38 ` ✗ Fi.CI.BAT: failure for Implicit dev_priv removal and GT compartmentalization (rev8) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190614151731.17608-29-tvrtko.ursulin@linux.intel.com \
--to=tvrtko.ursulin@linux.intel.com \
--cc=Intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox