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From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Dhinakaran Pandiyan <dhinakaran.pandiya@intel.com>
Subject: [PATCH v6 2/4] drm/i915: Add _TRANS2()
Date: Wed, 19 Jun 2019 16:02:20 -0700	[thread overview]
Message-ID: <20190619230222.4346-2-jose.souza@intel.com> (raw)
In-Reply-To: <20190619230222.4346-1-jose.souza@intel.com>

A new macro that is going to be added in a further patch will need to
adjust the offset returned by _MMIO_TRANS2(), so here adding
_TRANS2() and moving most of the implementation of _MMIO_TRANS2() to
it and while at it taking the opportunity to rename pipe to trans.

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiya@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiya@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d98142940c38..4fc8dc083766 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -250,9 +250,10 @@ static inline bool i915_mmio_reg_valid(i915_reg_t reg)
 #define _MMIO_PIPE2(pipe, reg)		_MMIO(INTEL_INFO(dev_priv)->pipe_offsets[pipe] - \
 					      INTEL_INFO(dev_priv)->pipe_offsets[PIPE_A] + (reg) + \
 					      DISPLAY_MMIO_BASE(dev_priv))
-#define _MMIO_TRANS2(pipe, reg)		_MMIO(INTEL_INFO(dev_priv)->trans_offsets[(pipe)] - \
-					      INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \
-					      DISPLAY_MMIO_BASE(dev_priv))
+#define _TRANS2(tran, reg)		(INTEL_INFO(dev_priv)->trans_offsets[(tran)] - \
+					 INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \
+					 DISPLAY_MMIO_BASE(dev_priv))
+#define _MMIO_TRANS2(tran, reg)		_MMIO(_TRANS2(tran, reg))
 #define _CURSOR2(pipe, reg)		_MMIO(INTEL_INFO(dev_priv)->cursor_offsets[(pipe)] - \
 					      INTEL_INFO(dev_priv)->cursor_offsets[PIPE_A] + (reg) + \
 					      DISPLAY_MMIO_BASE(dev_priv))
-- 
2.22.0

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  reply	other threads:[~2019-06-19 23:02 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-19 23:02 [PATCH v6 1/4] drm/i915/bdw+: Move misc display IRQ handling to it own function José Roberto de Souza
2019-06-19 23:02 ` José Roberto de Souza [this message]
2019-06-19 23:02 ` [PATCH v6 3/4] drm/i915/psr: Make PSR registers relative to transcoders José Roberto de Souza
2019-06-20  8:13   ` Jani Nikula
2019-06-20 17:36     ` Souza, Jose
2019-06-24 21:11       ` Souza, Jose
2019-06-29  2:25         ` Dhinakaran Pandiyan
2019-07-01 22:26           ` Souza, Jose
2019-07-02  0:49             ` Souza, Jose
2019-06-19 23:02 ` [PATCH v6 4/4] drm/i915: Add transcoder restriction to PSR2 José Roberto de Souza
2019-06-19 23:36 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [v6,1/4] drm/i915/bdw+: Move misc display IRQ handling to it own function Patchwork
2019-06-19 23:56 ` ✓ Fi.CI.BAT: success " Patchwork
2019-06-20 15:15 ` ✓ Fi.CI.IGT: " Patchwork

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