public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Patchwork <patchwork@emeril.freedesktop.org>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.CHECKPATCH: warning for EHL port programming (rev6)
Date: Thu, 04 Jul 2019 01:55:20 -0000	[thread overview]
Message-ID: <20190704015520.7776.3601@emeril.freedesktop.org> (raw)
In-Reply-To: <20190703233736.5816-1-matthew.d.roper@intel.com>

== Series Details ==

Series: EHL port programming (rev6)
URL   : https://patchwork.freedesktop.org/series/62492/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
4cf1d095c089 drm/i915/gen11: Start distinguishing 'phy' from 'port'
7e9f8a5e5eec drm/i915/gen11: Program DPCLKA_CFGCR0_ICL according to PHY
-:216: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'tc_port' - possible side-effects?
#216: FILE: drivers/gpu/drm/i915/i915_reg.h:9692:
+#define  ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port) (1 << ((tc_port) == PORT_TC4 ? \
+						      21 : (tc_port) + 12))

-:219: WARNING:LONG_LINE: line over 100 characters
#219: FILE: drivers/gpu/drm/i915/i915_reg.h:9695:
+#define  ICL_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(phy)	(3 << ICL_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy))

-:220: WARNING:LONG_LINE: line over 100 characters
#220: FILE: drivers/gpu/drm/i915/i915_reg.h:9696:
+#define  ICL_DPCLKA_CFGCR0_DDI_CLK_SEL(pll, phy)	((pll) << ICL_DPCLKA_CFGCR0_DDI_CLK_SEL_SHIFT(phy))

total: 0 errors, 2 warnings, 1 checks, 173 lines checked
7103f4d8a0ab drm/i915/gen11: Convert combo PHY logic to use new 'enum phy' namespace
-:346: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__phy' - possible side-effects?
#346: FILE: drivers/gpu/drm/i915/display/intel_combo_phy.c:9:
+#define for_each_combo_phy(__dev_priv, __phy) \
+	for ((__phy) = PHY_A; (__phy) < I915_MAX_PHYS; (__phy)++)	\
+		for_each_if(intel_phy_is_combo(__dev_priv, __phy))

-:353: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__phy' - possible side-effects?
#353: FILE: drivers/gpu/drm/i915/display/intel_combo_phy.c:13:
+#define for_each_combo_phy_reverse(__dev_priv, __phy) \
+	for ((__phy) = I915_MAX_PHYS; (__phy)-- > PHY_A;) \
+		for_each_if(intel_phy_is_combo(__dev_priv, __phy))

-:826: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__phy' - possible side-effects?
#826: FILE: drivers/gpu/drm/i915/display/intel_display.h:271:
+#define for_each_phy_masked(__phy, __phys_mask) \
+	for ((__phy) = PHY_A; (__phy) < I915_MAX_PHYS; (__phy)++)	\
+		for_each_if((__phys_mask) & BIT(__phy))

-:1006: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#1006: FILE: drivers/gpu/drm/i915/i915_reg.h:1880:
+#define CNL_PORT_PCS_DW1_LN0(phy)	_MMIO(_PICK(phy, \
 						    _CNL_PORT_PCS_DW1_LN0_AE, \
 						    _CNL_PORT_PCS_DW1_LN0_B, \
 						    _CNL_PORT_PCS_DW1_LN0_C, \

total: 1 errors, 0 warnings, 3 checks, 998 lines checked
4651fa91a8ce drm/i915: Transition port type checks to phy checks
09dfa8996618 drm/i915/ehl: Enable DDI-D

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-07-04  1:55 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-07-03 23:37 [PATCH v4 0/5] EHL port programming Matt Roper
2019-07-03 23:37 ` [PATCH v4 1/5] drm/i915/gen11: Start distinguishing 'phy' from 'port' Matt Roper
2019-07-04  9:18   ` Ville Syrjälä
2019-07-04  9:24     ` Ville Syrjälä
2019-07-04 14:54     ` Lucas De Marchi
2019-07-04 15:09       ` Ville Syrjälä
2019-07-04 15:55         ` Lucas De Marchi
2019-07-05 10:33           ` Ville Syrjälä
2019-07-08 14:02             ` Lucas De Marchi
2019-07-08 14:12               ` Ville Syrjälä
2019-07-08 23:59   ` Souza, Jose
2019-07-09  0:45     ` Souza, Jose
2019-07-03 23:37 ` [PATCH v4 2/5] drm/i915/gen11: Program DPCLKA_CFGCR0_ICL according to PHY Matt Roper
2019-07-04  1:06   ` [PATCH v5 " Matt Roper
2019-07-04  9:31     ` Ville Syrjälä
2019-07-09  0:15     ` Souza, Jose
2019-07-03 23:37 ` [PATCH v4 3/5] drm/i915/gen11: Convert combo PHY logic to use new 'enum phy' namespace Matt Roper
2019-07-04  9:39   ` Ville Syrjälä
2019-07-09  0:41   ` Souza, Jose
2019-07-03 23:37 ` [PATCH v4 4/5] drm/i915: Transition port type checks to phy checks Matt Roper
2019-07-04  0:02   ` [PATCH v5 " Matt Roper
2019-07-08 13:13     ` Ville Syrjälä
2019-07-04 16:07   ` [PATCH v4 " kbuild test robot
2019-07-09  1:00   ` Souza, Jose
2019-07-03 23:37 ` [PATCH v4 5/5] drm/i915/ehl: Enable DDI-D Matt Roper
2019-07-03 23:51 ` ✗ Fi.CI.BAT: failure for EHL port programming (rev4) Patchwork
2019-07-03 23:56 ` [PATCH v4 0/5] EHL port programming Souza, Jose
2019-07-04  0:40 ` ✗ Fi.CI.CHECKPATCH: warning for EHL port programming (rev5) Patchwork
2019-07-04  0:43 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-07-04  1:18 ` ✓ Fi.CI.BAT: success " Patchwork
2019-07-04  1:55 ` Patchwork [this message]
2019-07-04  2:16 ` ✓ Fi.CI.BAT: success for EHL port programming (rev6) Patchwork
2019-07-05  6:44 ` ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190704015520.7776.3601@emeril.freedesktop.org \
    --to=patchwork@emeril.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=matthew.d.roper@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox