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From: Manasi Navare <manasi.d.navare@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Leho Kraav <leho@kraav.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/2] drm/i915: Don't advertise modes that exceed the max plane size
Date: Wed, 18 Sep 2019 07:28:29 -0700	[thread overview]
Message-ID: <20190918142829.GA29798@intel.com> (raw)
In-Reply-To: <20190905135044.2001-2-ville.syrjala@linux.intel.com>

On Thu, Sep 05, 2019 at 04:50:44PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Modern platforms allow the transcoders hdisplay/vdisplay to exceed the
> planes' max resolution. This has the nasty implication that modes on the
> connectors' mode list may not be usable when the user asks for a
> fullscreen plane. Seeing as that is the most common use case it seems
> prudent to filter out modes that don't allow for fullscreen planes to
> be enabled.
> 
> Let's do that in the connetor .mode_valid() hook so that normally
> such modes are kept hidden but the user is still able to forcibly
> specify such a mode if they know they don't need fullscreen planes.
> 
> This is in line with ealier policies regarding certain clock limits.
> The idea is to prevent the casual user from encountering a mode that
> would fail under typical conditions, but allow the expert user to
> force things if they so wish.
> 
> Maybe in the future we should consider automagically using two
> planes when one can't cover the entire screen? Wouldn't be a
> great match for the current uapi with explicit planes though,
> but I guess no worse than using two pipes (which we apparently
> have to in the future anyway). Either that or we'd have to
> teach userspace to do it for us.
> 
> Cc: Leho Kraav <leho@kraav.com>
> Cc: Sean Paul <sean@poorly.run>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 31 ++++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_display.h |  4 +++
>  drivers/gpu/drm/i915/display/intel_dp.c      |  2 +-
>  drivers/gpu/drm/i915/display/intel_dsi.c     |  3 +-
>  drivers/gpu/drm/i915/display/intel_hdmi.c    |  4 ++-
>  5 files changed, 41 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 4e63342ea597..99466a29bf36 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -15846,6 +15846,7 @@ intel_mode_valid(struct drm_device *dev,
>  			   DRM_MODE_FLAG_CLKDIV2))
>  		return MODE_BAD;
>  
> +	/* Transcoder timing limits */
>  	if (INTEL_GEN(dev_priv) >= 9 ||
>  	    IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
>  		hdisplay_max = 8192; /* FDI max 4096 handled elsewhere */
> @@ -15879,6 +15880,36 @@ intel_mode_valid(struct drm_device *dev,
>  	return MODE_OK;
>  }
>  
> +enum drm_mode_status
> +intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
> +				const struct drm_display_mode *mode)
> +{
> +	int plane_width_max, plane_height_max;
> +
> +	/*
> +	 * intel_mode_valid() should be
> +	 * sufficient on older platforms.
> +	 */
> +	if (INTEL_GEN(dev_priv) < 9)
> +		return MODE_OK;
> +
> +	/*
> +	 * Most people will probably want a fullscreen
> +	 * plane so let's not advertize modes that are
> +	 * too big for that.
> +	 */
> +	plane_width_max = 5120;
> +	plane_height_max = 4096;

For ICL+, shouldnt tthe plane_height_max be 4320?

Manasi

> +
> +	if (mode->hdisplay > plane_width_max)
> +		return MODE_H_ILLEGAL;
> +
> +	if (mode->vdisplay > plane_height_max)
> +		return MODE_V_ILLEGAL;
> +
> +	return MODE_OK;
> +}
> +
>  static const struct drm_mode_config_funcs intel_mode_funcs = {
>  	.fb_create = intel_user_framebuffer_create,
>  	.get_format_info = intel_get_format_info,
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 33fd523c4622..ecabb827eb87 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -32,6 +32,7 @@ enum link_m_n_set;
>  struct dpll;
>  struct drm_connector;
>  struct drm_device;
> +struct drm_display_mode;
>  struct drm_encoder;
>  struct drm_file;
>  struct drm_framebuffer;
> @@ -447,6 +448,9 @@ void lpt_disable_clkout_dp(struct drm_i915_private *dev_priv);
>  u32 intel_plane_fb_max_stride(struct drm_i915_private *dev_priv,
>  			      u32 pixel_format, u64 modifier);
>  bool intel_plane_can_remap(const struct intel_plane_state *plane_state);
> +enum drm_mode_status
> +intel_mode_valid_max_plane_size(struct drm_i915_private *dev_priv,
> +				const struct drm_display_mode *mode);
>  enum phy intel_port_to_phy(struct drm_i915_private *i915, enum port port);
>  
>  void intel_plane_destroy(struct drm_plane *plane);
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index d09133a958e1..ccaf9f00b747 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -562,7 +562,7 @@ intel_dp_mode_valid(struct drm_connector *connector,
>  	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
>  		return MODE_H_ILLEGAL;
>  
> -	return MODE_OK;
> +	return intel_mode_valid_max_plane_size(dev_priv, mode);
>  }
>  
>  u32 intel_dp_pack_aux(const u8 *src, int src_bytes)
> diff --git a/drivers/gpu/drm/i915/display/intel_dsi.c b/drivers/gpu/drm/i915/display/intel_dsi.c
> index 5fec02aceaed..a2a937109a5a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dsi.c
> +++ b/drivers/gpu/drm/i915/display/intel_dsi.c
> @@ -55,6 +55,7 @@ int intel_dsi_get_modes(struct drm_connector *connector)
>  enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector,
>  					  struct drm_display_mode *mode)
>  {
> +	struct drm_i915_private *dev_priv = to_i915(connector->dev);
>  	struct intel_connector *intel_connector = to_intel_connector(connector);
>  	const struct drm_display_mode *fixed_mode = intel_connector->panel.fixed_mode;
>  	int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
> @@ -73,7 +74,7 @@ enum drm_mode_status intel_dsi_mode_valid(struct drm_connector *connector,
>  			return MODE_CLOCK_HIGH;
>  	}
>  
> -	return MODE_OK;
> +	return intel_mode_valid_max_plane_size(dev_priv, mode);
>  }
>  
>  struct intel_dsi_host *intel_dsi_host_init(struct intel_dsi *intel_dsi,
> diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
> index c500fc9154c8..dbc686515dce 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
> @@ -2188,8 +2188,10 @@ intel_hdmi_mode_valid(struct drm_connector *connector,
>  			status = hdmi_port_clock_valid(hdmi, clock * 5 / 4,
>  						       true, force_dvi);
>  	}
> +	if (status != MODE_OK)
> +		return status;
>  
> -	return status;
> +	return intel_mode_valid_max_plane_size(dev_priv, mode);
>  }
>  
>  static bool hdmi_deep_color_possible(const struct intel_crtc_state *crtc_state,
> -- 
> 2.21.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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  parent reply	other threads:[~2019-09-18 14:26 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-05 13:50 [PATCH 1/2] drm/i915: Bump skl+ max plane width to 5k for linear/x-tiled Ville Syrjala
2019-09-05 13:50 ` [PATCH 2/2] drm/i915: Don't advertise modes that exceed the max plane size Ville Syrjala
2019-09-18 14:08   ` Maarten Lankhorst
2019-09-18 14:28   ` Manasi Navare [this message]
2019-09-18 14:59     ` Ville Syrjälä
2019-09-18 15:07   ` [PATCH v2 " Ville Syrjala
2019-09-18 15:24     ` Sean Paul
2019-09-18 16:02       ` Ville Syrjälä
2019-09-18 16:27         ` Manasi Navare
2019-09-18 20:21         ` Sean Paul
2019-09-19 13:10           ` Ville Syrjälä
2019-09-19  8:52     ` Maarten Lankhorst
2019-09-05 15:35 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Bump skl+ max plane width to 5k for linear/x-tiled Patchwork
2019-09-05 19:38 ` ✓ Fi.CI.IGT: " Patchwork
2019-09-18 14:09 ` [PATCH 1/2] " Maarten Lankhorst
2019-09-18 15:27 ` Sean Paul
2019-09-18 16:33 ` ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Bump skl+ max plane width to 5k for linear/x-tiled (rev2) Patchwork

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