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From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [PATCH 2/2] drm/i915: Add hardware readout for FEC
Date: Wed, 25 Sep 2019 10:21:10 +0200	[thread overview]
Message-ID: <20190925082110.17439-2-maarten.lankhorst@linux.intel.com> (raw)
In-Reply-To: <20190925082110.17439-1-maarten.lankhorst@linux.intel.com>

Readout the FEC state in encoder->get_config(), this will allow
us to ensure that we can correctly inherit the state from boot,
and that we set FEC during modeset.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c     | 17 +++++++++++++++++
 drivers/gpu/drm/i915/display/intel_display.c |  1 +
 2 files changed, 18 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 33cd766f9eea..14fe987888a6 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4021,6 +4021,23 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
 		pipe_config->lane_count =
 			((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) + 1;
 		intel_dp_get_m_n(intel_crtc, pipe_config);
+
+		if (INTEL_GEN(dev_priv) >= 11) {
+			i915_reg_t dp_tp_ctl;
+
+			if (IS_GEN(dev_priv, 11))
+				dp_tp_ctl = DP_TP_CTL(encoder->port);
+			else
+				dp_tp_ctl = TGL_DP_TP_CTL(pipe_config->cpu_transcoder);
+
+			pipe_config->fec_enable =
+				I915_READ(dp_tp_ctl) & DP_TP_CTL_FEC_ENABLE;
+
+			DRM_DEBUG_KMS("[ENCODER:%d:%s] Fec status: %u\n",
+				      encoder->base.base.id, encoder->base.name,
+				      pipe_config->fec_enable);
+		}
+
 		break;
 	case TRANS_DDI_MODE_SELECT_DP_MST:
 		pipe_config->output_types |= BIT(INTEL_OUTPUT_DP_MST);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index c4c9286be987..31698a57773f 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -12836,6 +12836,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
 	PIPE_CONF_CHECK_BOOL(hdmi_scrambling);
 	PIPE_CONF_CHECK_BOOL(hdmi_high_tmds_clock_ratio);
 	PIPE_CONF_CHECK_BOOL(has_infoframe);
+	PIPE_CONF_CHECK_BOOL(fec_enable);
 
 	PIPE_CONF_CHECK_BOOL_INCOMPLETE(has_audio);
 
-- 
2.20.1

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  reply	other threads:[~2019-09-25  8:21 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-09-25  8:21 [PATCH 1/2] drm/i915/dp: Fix dsc bpp calculations, v5 Maarten Lankhorst
2019-09-25  8:21 ` Maarten Lankhorst [this message]
2019-09-25  9:10 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] " Patchwork
2019-09-25  9:56 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-25 10:26 ` [Intel-gfx] [PATCH 1/2] " Ville Syrjälä
2019-09-25 10:34   ` Maarten Lankhorst
2019-09-25 10:40     ` Ville Syrjälä
2019-09-25 22:43 ` Sasha Levin
2019-09-25 23:14 ` ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork

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