From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 14/27] drm/i915: Expose engine properties via sysfs
Date: Fri, 27 Sep 2019 13:48:02 -0700 [thread overview]
Message-ID: <20190927204802.GC24000@intel.com> (raw)
In-Reply-To: <20190925100137.17956-15-chris@chris-wilson.co.uk>
On Wed, Sep 25, 2019 at 11:01:24AM +0100, Chris Wilson wrote:
> Preliminary stub to add engines underneath /sys/class/drm/cardN/, so
> that we can expose properties on each engine to the sysadmin.
>
> To start with we have basic analogues of the i915_query ioctl so that we
> can pretty print engine discovery from the shell, and flesh out the
> directory structure. Later we will add writeable sysadmin properties such
> as per-engine timeout controls.
>
> An example tree of the engine properties on Braswell:
> /sys/class/drm/card0
> └── engine
> ├── bcs0
> │ ├── class
> │ ├── heartbeat_interval_ms
> │ ├── instance
> │ ├── mmio_base
> │ └── name
> ├── rcs0
> │ ├── class
> │ ├── heartbeat_interval_ms
> │ ├── instance
> │ ├── mmio_base
> │ └── name
> ├── vcs0
> │ ├── class
> │ ├── heartbeat_interval_ms
> │ ├── instance
> │ ├── mmio_base
> │ └── name
> └── vecs0
> ├── class
> ├── heartbeat_interval_ms
> ├── instance
> ├── mmio_base
> └── name
>
Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> ---
> drivers/gpu/drm/i915/Makefile | 3 +-
> drivers/gpu/drm/i915/gt/intel_engine_sysfs.c | 119 +++++++++++++++++++
> drivers/gpu/drm/i915/gt/intel_engine_sysfs.h | 14 +++
> drivers/gpu/drm/i915/i915_sysfs.c | 4 +
> 4 files changed, 139 insertions(+), 1 deletion(-)
> create mode 100644 drivers/gpu/drm/i915/gt/intel_engine_sysfs.c
> create mode 100644 drivers/gpu/drm/i915/gt/intel_engine_sysfs.h
>
> diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
> index cba19470feb5..ba98a2067433 100644
> --- a/drivers/gpu/drm/i915/Makefile
> +++ b/drivers/gpu/drm/i915/Makefile
> @@ -76,8 +76,9 @@ gt-y += \
> gt/intel_breadcrumbs.o \
> gt/intel_context.o \
> gt/intel_engine_cs.o \
> - gt/intel_engine_pool.o \
> gt/intel_engine_pm.o \
> + gt/intel_engine_pool.o \
> + gt/intel_engine_sysfs.o \
> gt/intel_engine_user.o \
> gt/intel_gt.o \
> gt/intel_gt_irq.o \
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c b/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c
> new file mode 100644
> index 000000000000..cbe9ec59beeb
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_sysfs.c
> @@ -0,0 +1,119 @@
> +/*
> + * SPDX-License-Identifier: MIT
> + *
> + * Copyright © 2019 Intel Corporation
> + */
> +
> +#include <linux/kobject.h>
> +#include <linux/sysfs.h>
> +
> +#include "i915_drv.h"
> +#include "intel_engine.h"
> +#include "intel_engine_sysfs.h"
> +
> +struct kobj_engine {
> + struct kobject base;
> + struct intel_engine_cs *engine;
> +};
> +
> +static struct intel_engine_cs *kobj_to_engine(struct kobject *kobj)
> +{
> + return container_of(kobj, struct kobj_engine, base)->engine;
> +}
> +
> +static ssize_t
> +name_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
> +{
> + return sprintf(buf, "%s\n", kobj_to_engine(kobj)->name);
> +}
> +
> +static ssize_t
> +class_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
> +{
> + return sprintf(buf, "%d\n", kobj_to_engine(kobj)->uabi_class);
> +}
> +
> +static ssize_t
> +inst_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
> +{
> + return sprintf(buf, "%d\n", kobj_to_engine(kobj)->uabi_instance);
> +}
> +
> +static ssize_t
> +mmio_show(struct kobject *kobj, struct kobj_attribute *attr, char *buf)
> +{
> + return sprintf(buf, "0x%x\n", kobj_to_engine(kobj)->mmio_base);
> +}
> +
> +static struct kobj_attribute name_attr = __ATTR(name, 0444, name_show, NULL);
> +static struct kobj_attribute class_attr = __ATTR(class, 0444, class_show, NULL);
> +static struct kobj_attribute inst_attr = __ATTR(instance, 0444, inst_show, NULL);
> +static struct kobj_attribute mmio_attr = __ATTR(mmio_base, 0444, mmio_show, NULL);
> +
> +static void kobj_engine_release(struct kobject *kobj)
> +{
> + kfree(kobj);
> +}
> +
> +static struct kobj_type kobj_engine_type = {
> + .release = kobj_engine_release,
> + .sysfs_ops = &kobj_sysfs_ops
> +};
> +
> +static struct kobject *
> +kobj_engine(struct kobject *dir, struct intel_engine_cs *engine)
> +{
> + struct kobj_engine *ke;
> +
> + ke = kzalloc(sizeof(*ke), GFP_KERNEL);
> + if (!ke)
> + return NULL;
> +
> + kobject_init(&ke->base, &kobj_engine_type);
> + ke->engine = engine;
> +
> + if (kobject_add(&ke->base, dir, "%s", engine->name)) {
> + kobject_put(&ke->base);
> + return NULL;
> + }
> +
> + /* xfer ownership to sysfs tree */
> + return &ke->base;
> +}
> +
> +void intel_engines_add_sysfs(struct drm_i915_private *i915)
> +{
> + static const struct attribute *files[] = {
> + &name_attr.attr,
> + &class_attr.attr,
> + &inst_attr.attr,
> + &mmio_attr.attr,
> + NULL
> + };
> +
> + struct device *kdev = i915->drm.primary->kdev;
> + struct intel_engine_cs *engine;
> + struct kobject *dir;
> +
> + dir = kobject_create_and_add("engine", &kdev->kobj);
> + if (!dir)
> + return;
> +
> + for_each_uabi_engine(engine, i915) {
> + struct kobject *kobj;
> +
> + kobj = kobj_engine(dir, engine);
> + if (!kobj)
> + goto err_engine;
> +
> + if (sysfs_create_files(kobj, files))
> + goto err_engine;
> +
> + if (0) {
> +err_engine:
> + dev_err(kdev, "Failed to add sysfs engine '%s'\n",
> + engine->name);
> + break;
> + }
> + }
> +}
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_sysfs.h b/drivers/gpu/drm/i915/gt/intel_engine_sysfs.h
> new file mode 100644
> index 000000000000..ef44a745b70a
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_sysfs.h
> @@ -0,0 +1,14 @@
> +/*
> + * SPDX-License-Identifier: MIT
> + *
> + * Copyright © 2019 Intel Corporation
> + */
> +
> +#ifndef INTEL_ENGINE_SYSFS_H
> +#define INTEL_ENGINE_SYSFS_H
> +
> +struct drm_i915_private;
> +
> +void intel_engines_add_sysfs(struct drm_i915_private *i915);
> +
> +#endif /* INTEL_ENGINE_SYSFS_H */
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index d8a3b180c084..6b88d934927a 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -30,6 +30,8 @@
> #include <linux/stat.h>
> #include <linux/sysfs.h>
>
> +#include "gt/intel_engine_sysfs.h"
> +
> #include "i915_drv.h"
> #include "i915_sysfs.h"
> #include "intel_pm.h"
> @@ -618,6 +620,8 @@ void i915_setup_sysfs(struct drm_i915_private *dev_priv)
> DRM_ERROR("RPS sysfs setup failed\n");
>
> i915_setup_error_capture(kdev);
> +
> + intel_engines_add_sysfs(dev_priv);
> }
>
> void i915_teardown_sysfs(struct drm_i915_private *dev_priv)
> --
> 2.23.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2019-09-27 20:47 UTC|newest]
Thread overview: 70+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-25 10:01 struct_mutex is over the hill and far away Chris Wilson
2019-09-25 10:01 ` [PATCH 01/27] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling) Chris Wilson
2019-09-25 10:01 ` [PATCH 02/27] drm/mm: Pack allocated/scanned boolean into a bitfield Chris Wilson
2019-09-25 10:01 ` [PATCH 03/27] drm/i915: Only track bound elements of the GTT Chris Wilson
2019-09-25 10:01 ` [PATCH 04/27] drm/i915: Mark up address spaces that may need to allocate Chris Wilson
2019-09-25 10:01 ` [PATCH 05/27] drm/i915: Pull i915_vma_pin under the vm->mutex Chris Wilson
2019-09-27 8:47 ` Tvrtko Ursulin
2019-09-27 11:06 ` Chris Wilson
2019-09-25 10:01 ` [PATCH 06/27] drm/i915: Push the i915_active.retire into a worker Chris Wilson
2019-09-25 10:01 ` [PATCH 07/27] drm/i915: Coordinate i915_active with its own mutex Chris Wilson
2019-09-27 11:10 ` Tvrtko Ursulin
2019-09-27 11:25 ` Chris Wilson
2019-09-27 12:08 ` Tvrtko Ursulin
2019-09-27 12:16 ` Chris Wilson
2019-09-27 12:25 ` Tvrtko Ursulin
2019-09-27 12:32 ` Chris Wilson
2019-09-27 13:58 ` Tvrtko Ursulin
2019-09-27 14:10 ` Chris Wilson
2019-09-25 10:01 ` [PATCH 08/27] drm/i915: Move idle barrier cleanup into engine-pm Chris Wilson
2019-09-25 10:01 ` [PATCH 09/27] drm/i915: Drop struct_mutex from around i915_retire_requests() Chris Wilson
2019-09-25 10:01 ` [PATCH 10/27] drm/i915: Remove the GEM idle worker Chris Wilson
2019-09-25 10:01 ` [PATCH 11/27] drm/i915: Merge wait_for_timelines with retire_request Chris Wilson
2019-09-25 10:47 ` Tvrtko Ursulin
2019-09-25 10:54 ` Chris Wilson
2019-09-25 10:01 ` [PATCH 12/27] drm/i915: Move request runtime management onto gt Chris Wilson
2019-09-25 10:57 ` Tvrtko Ursulin
2019-09-25 11:17 ` Chris Wilson
2019-09-25 11:24 ` Chris Wilson
2019-09-25 11:29 ` Chris Wilson
2019-09-25 11:33 ` Chris Wilson
2019-09-25 15:17 ` Tvrtko Ursulin
2019-09-25 10:01 ` [PATCH 13/27] drm/i915: Move global activity tracking from GEM to GT Chris Wilson
2019-09-25 10:01 ` [PATCH 14/27] drm/i915: Expose engine properties via sysfs Chris Wilson
2019-09-27 20:48 ` Rodrigo Vivi [this message]
2019-09-25 10:01 ` [PATCH 15/27] drm/i915/execlists: Force preemption Chris Wilson
2019-09-25 10:01 ` [PATCH 16/27] drm/i915: Mark up "sentinel" requests Chris Wilson
2019-09-25 10:01 ` [PATCH 17/27] drm/i915/execlists: Cancel banned contexts on schedule-out Chris Wilson
2019-09-25 10:01 ` [PATCH 18/27] drm/i915: Cancel non-persistent contexts on close Chris Wilson
2019-09-25 10:01 ` [PATCH 19/27] drm/i915: Replace hangcheck by heartbeats Chris Wilson
2019-09-27 8:26 ` Joonas Lahtinen
2019-09-27 9:18 ` Chris Wilson
2019-09-25 10:01 ` [PATCH 20/27] drm/i915: Remove logical HW ID Chris Wilson
2019-09-25 12:41 ` Tvrtko Ursulin
2019-09-25 12:51 ` Chris Wilson
2019-09-25 14:38 ` Tvrtko Ursulin
2019-09-25 17:59 ` Daniele Ceraolo Spurio
2019-09-25 18:23 ` Matthew Brost
2019-09-25 10:01 ` [PATCH 21/27] drm/i915: Move context management under GEM Chris Wilson
2019-09-26 13:57 ` Tvrtko Ursulin
2019-10-02 16:09 ` Tvrtko Ursulin
2019-10-03 7:35 ` Chris Wilson
2019-09-25 10:01 ` [PATCH 22/27] drm/i915/overlay: Drop struct_mutex guard Chris Wilson
2019-09-25 12:43 ` Tvrtko Ursulin
2019-09-25 12:53 ` Chris Wilson
2019-09-25 13:01 ` Tvrtko Ursulin
2019-09-25 13:11 ` Chris Wilson
2019-09-25 10:01 ` [PATCH 23/27] drm/i915: Drop struct_mutex guard from debugfs/framebuffer_info Chris Wilson
2019-09-25 12:45 ` Tvrtko Ursulin
2019-09-25 10:01 ` [PATCH 24/27] drm/i915: Remove struct_mutex guard for debugfs/opregion Chris Wilson
2019-09-25 12:51 ` Tvrtko Ursulin
2019-09-25 10:01 ` [PATCH 25/27] drm/i915: Drop struct_mutex from suspend state save/restore Chris Wilson
2019-09-25 12:52 ` Tvrtko Ursulin
2019-09-25 10:01 ` [PATCH 26/27] drm/i915/selftests: Drop vestigal struct_mutex guards Chris Wilson
2019-09-25 12:55 ` Tvrtko Ursulin
2019-09-25 10:01 ` [PATCH 27/27] drm/i915: Drop struct_mutex from around GEM initialisation Chris Wilson
2019-09-25 12:56 ` Tvrtko Ursulin
2019-09-25 10:21 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/27] dma-fence: Serialise signal enabling (dma_fence_enable_sw_signaling) Patchwork
2019-09-25 10:34 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-09-25 10:51 ` ✓ Fi.CI.BAT: success " Patchwork
2019-09-26 0:56 ` ✗ Fi.CI.IGT: failure " Patchwork
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