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From: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Matthew Auld <matthew.auld@intel.com>
Subject: [PATCH 4/5] drm/i915: cpu-map based dumb buffers
Date: Wed, 23 Oct 2019 11:24:56 +0300	[thread overview]
Message-ID: <20191023082457.24059-4-abdiel.janulgue@linux.intel.com> (raw)
In-Reply-To: <20191023082457.24059-1-abdiel.janulgue@linux.intel.com>

Prefer CPU WC mmaps via our new mmap offset plumbing otherwise fall-
back to GTT mmaps when hw doesn't support PAT

Signed-off-by: Abdiel Janulgue <abdiel.janulgue@linux.intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_mman.c | 13 +++++++++++++
 drivers/gpu/drm/i915/i915_drv.c          |  1 +
 drivers/gpu/drm/i915/i915_drv.h          |  2 ++
 3 files changed, 16 insertions(+)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index a3eb194fd3b4..db810af1cc13 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -566,6 +566,19 @@ static int gem_mmap_offset(struct drm_device *dev, void *data,
 					     &args->offset);
 }
 
+int
+i915_gem_mmap_dumb(struct drm_file *file,
+		  struct drm_device *dev,
+		  u32 handle,
+		  u64 *offset)
+{
+	enum i915_mmap_type mmap_type = boot_cpu_has(X86_FEATURE_PAT) ?
+		I915_MMAP_TYPE_WC : I915_MMAP_TYPE_GTT;
+
+	return __assign_gem_object_mmap_data(file, handle, mmap_type,
+					     offset);
+}
+
 /**
  * i915_gem_mmap_gtt_ioctl - prepare an object for GTT mmap'ing
  * @dev: DRM device
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 7dba9b2ea00b..031f59c9e5c9 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -2750,6 +2750,7 @@ static struct drm_driver driver = {
 	.get_scanout_position = i915_get_crtc_scanoutpos,
 
 	.dumb_create = i915_gem_dumb_create,
+	.dumb_map_offset = i915_gem_mmap_dumb,
 	.ioctls = i915_ioctls,
 	.num_ioctls = ARRAY_SIZE(i915_ioctls),
 	.fops = &i915_driver_fops,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index ed0fc1d6dfab..fa26f0575efe 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1932,6 +1932,8 @@ i915_mutex_lock_interruptible(struct drm_device *dev)
 int i915_gem_dumb_create(struct drm_file *file_priv,
 			 struct drm_device *dev,
 			 struct drm_mode_create_dumb *args);
+int i915_gem_mmap_dumb(struct drm_file *file_priv, struct drm_device *dev,
+		      u32 handle, u64 *offset);
 int i915_gem_mmap_gtt_version(void);
 
 int __must_check i915_gem_set_global_seqno(struct drm_device *dev, u32 seqno);
-- 
2.23.0

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  parent reply	other threads:[~2019-10-23  8:25 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-23  8:24 [PATCH 1/5] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core Abdiel Janulgue
2019-10-23  8:24 ` [PATCH 2/5] drm/i915: define i915_ggtt_has_aperture Abdiel Janulgue
2019-10-23  8:24 ` [PATCH 3/5] drm/i915: Introduce DRM_I915_GEM_MMAP_OFFSET Abdiel Janulgue
2019-10-23  8:29   ` Abdiel Janulgue
2019-10-23  8:24 ` Abdiel Janulgue [this message]
2019-10-23  8:24 ` [PATCH 5/5] drm/i915: Add cpu fault handler for mmap_offset Abdiel Janulgue
2019-10-23 12:52 ` ✗ Fi.CI.BUILD: failure for series starting with [1/5] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core Patchwork
2019-10-23 12:52   ` [Intel-gfx] " Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2019-10-23  8:30 [PATCH 1/5] " Abdiel Janulgue
2019-10-23  8:30 ` [PATCH 4/5] drm/i915: cpu-map based dumb buffers Abdiel Janulgue
2019-10-21 10:48 [PATCH 1/5] drm/i915: Allow i915 to manage the vma offset nodes instead of drm core Abdiel Janulgue
2019-10-21 10:48 ` [PATCH 4/5] drm/i915: cpu-map based dumb buffers Abdiel Janulgue
2019-10-21 13:35   ` Chris Wilson
2019-10-22  7:52     ` Abdiel Janulgue
2019-10-22 10:37       ` Chris Wilson

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