Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Jian-Hong Pan <jian-hong@endlessm.com>,
	intel-gfx@lists.freedesktop.org,
	Paulo Zanoni <paulo.r.zanoni@intel.com>,
	Daniel Drake <drake@endlessm.com>
Subject: Re: [Intel-gfx] [PATCH v2 14/14] drm/i915/fbc: Reallocate cfb if we need more of it
Date: Tue, 3 Dec 2019 15:04:48 +0200	[thread overview]
Message-ID: <20191203130448.GO1208@intel.com> (raw)
In-Reply-To: <a18b796f-6232-cad2-7d5f-ed4b114e1b42@linux.intel.com>

On Tue, Dec 03, 2019 at 09:45:19AM +0100, Maarten Lankhorst wrote:
> Op 29-11-2019 om 12:37 schreef Ville Syrjälä:
> > On Fri, Nov 29, 2019 at 09:48:45AM +0100, Maarten Lankhorst wrote:
> >> Op 28-11-2019 om 16:59 schreef Ville Syrjälä:
> >>> On Thu, Nov 28, 2019 at 04:48:04PM +0100, Maarten Lankhorst wrote:
> >>>> Op 27-11-2019 om 21:12 schreef Ville Syrjala:
> >>>>> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>>>>
> >>>>> The code assumes we can omit the cfb allocation once fbc
> >>>>> has been enabled once. That's nonsense. Let's try to
> >>>>> reallocate it if we need to.
> >>>>>
> >>>>> The code is still a mess, but maybe this is enough to get
> >>>>> fbc going in some cases where it initially underallocates
> >>>>> the cfb and there's no full modeset to fix it up.
> >>>>>
> >>>>> Cc: Daniel Drake <drake@endlessm.com>
> >>>>> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> >>>>> Cc: Jian-Hong Pan <jian-hong@endlessm.com>
> >>>>> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> >>>>> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >>>>> ---
> >>>>>  drivers/gpu/drm/i915/display/intel_fbc.c | 22 +++++++++++++++-------
> >>>>>  1 file changed, 15 insertions(+), 7 deletions(-)
> >>>>>
> >>>>> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> >>>>> index c976698b0729..928059a5da80 100644
> >>>>> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> >>>>> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> >>>>> @@ -672,6 +672,14 @@ static void intel_fbc_update_state_cache(struct intel_crtc *crtc,
> >>>>>  		cache->fence_id = -1;
> >>>>>  }
> >>>>>  
> >>>>> +static bool intel_fbc_cfb_size_changed(struct drm_i915_private *dev_priv)
> >>>>> +{
> >>>>> +	struct intel_fbc *fbc = &dev_priv->fbc;
> >>>>> +
> >>>>> +	return intel_fbc_calculate_cfb_size(dev_priv, &fbc->state_cache) >
> >>>>> +		fbc->compressed_fb.size * fbc->threshold;
> >>>>> +}
> >>>>> +
> >>>>>  static bool intel_fbc_can_activate(struct intel_crtc *crtc)
> >>>>>  {
> >>>>>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> >>>>> @@ -757,8 +765,7 @@ static bool intel_fbc_can_activate(struct intel_crtc *crtc)
> >>>>>  	 * we didn't get any invalidate/deactivate calls, but this would require
> >>>>>  	 * a lot of tracking just for a specific case. If we conclude it's an
> >>>>>  	 * important case, we can implement it later. */
> >>>>> -	if (intel_fbc_calculate_cfb_size(dev_priv, &fbc->state_cache) >
> >>>>> -	    fbc->compressed_fb.size * fbc->threshold) {
> >>>>> +	if (intel_fbc_cfb_size_changed(dev_priv)) {
> >>>>>  		fbc->no_fbc_reason = "CFB requirements changed";
> >>>>>  		return false;
> >>>>>  	}
> >>>>> @@ -1112,12 +1119,12 @@ void intel_fbc_enable(struct intel_crtc *crtc,
> >>>>>  	mutex_lock(&fbc->lock);
> >>>>>  
> >>>>>  	if (fbc->crtc) {
> >>>>> -		WARN_ON(fbc->crtc == crtc && !crtc_state->enable_fbc);
> >>>>> -		goto out;
> >>>>> -	}
> >>>>> +		if (fbc->crtc != crtc ||
> >>>>> +		    !intel_fbc_cfb_size_changed(dev_priv))
> >>>>> +			goto out;
> >>>>>  
> >>>>> -	if (!crtc_state->enable_fbc)
> >>>>> -		goto out;
> >>>>> +		__intel_fbc_disable(dev_priv);
> >>>>> +	}
> >>>>>  
> >>>>>  	WARN_ON(fbc->active);
> >>>>>  
> >>>>> @@ -1130,6 +1137,7 @@ void intel_fbc_enable(struct intel_crtc *crtc,
> >>>>>  	if (intel_fbc_alloc_cfb(dev_priv,
> >>>>>  				intel_fbc_calculate_cfb_size(dev_priv, cache),
> >>>>>  				fb->format->cpp[0])) {
> >>>>> +		cache->plane.visible = false;
> >>>>>  		fbc->no_fbc_reason = "not enough stolen memory";
> >>>>>  		goto out;
> >>>>>  	}
> >>>> Makes sense, unfortunately kms_cursor_legacy starts failing on this series. :(
> >>>>
> >>>> For 1-11, 14
> >>>>
> >>>> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> >>>>
> >>>> We should probably get rid of the FBC disable on frontbuffer disable as well. I had some patches but nothing upstream-worthy yet. :(
> >>> How would we get rid of the disable there? By triggering nukes at some
> >>> predefined interval? Doesn't sound all that great.
> >> Not touching FBC on frontbuffer write at all, and forcing userspace to use the dirtyfb api. I think the whole implicit tracking should be removed.
> > Perhaps. Not sure userspace is ready for that though.
> 
> We have to audit that DirtyFB is called on all gen9+ userspace, because FBC is only enabled by default on those platforms.

I'll probably enable it across the board once I get it fixed.

> 
> I know the modesetting ddx does, I believe xf86-video-intel as well. So it should be safe to do. We could hide the old behavior behind a kernel parameter for now for 1 or 2 releases,
> 
> so we can chicken out if needed.
> 
> > I guess the only long lasting frontbuffer invalidate is the
> > one from set_domain. Everything else is bounded and so we
> > know the flush is going to come in a somewhat timely manner.
> > So for those cases I guess we could perhaps skip the invalidate.
> >
> > Hmm. Also looks like ORIGIN_GTT has been neutered and now
> > we treat everyting as ORIGIN_CPU. That's maybe not so great.
> > Should probably reinstate ORIGIN_GTT so we can actually benefit
> > from the hw gtt tracking. Or we just try to kill that off as well.
> HW tracking has been buggy for a long time, and is no longer available on current hw because of those bugs.

Which bugs? We still enable it on all platforms so I don't know what
you mean by it not being available.

> > Also I wonder where is the flush counterpart to the invalidate
> > in i915_gem_object_prepare_write()?
> >
> Not sure.

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2019-12-03 13:04 UTC|newest]

Thread overview: 54+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-27 20:12 [PATCH v2 00/14] drm/i915/fbc: Fix FBC for glk+ Ville Syrjala
2019-11-27 20:12 ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 01/14] drm/i915/fbc: Disable fbc by default on all glk+ Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-29 18:34   ` Sasha Levin
2019-11-29 18:34     ` [Intel-gfx] " Sasha Levin
2019-11-27 20:12 ` [PATCH v2 02/14] drm/i915/fbc: Nuke bogus single pipe fbc1 restriction Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 03/14] drm/i915: Relocate intel_crtc_active() Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 04/14] drm/i915/fbc: Remove the FBC_RT_BASE setup for ILK/SNB Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 05/14] drm/i915/fbc: Precompute gen9 cfb stride w/a Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 06/14] drm/i915/fbc: Track plane visibility Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 07/14] drm/i915/fbc: Store fence_id direction in fbc cache/params Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 08/14] drm/i915/fbc: Make fence_id optional for i965gm Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 09/14] drm/i915/fbc: s/gen9 && !glk/gen9_bc || bxt/ Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 10/14] drm/i915/fbc: Nuke fbc.enabled Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 11/14] drm/i915/fbc: Start using flip nuke Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 12/14] drm/i915/fbc: Wait for vblank after FBC disable on glk+ Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-28 15:03   ` [PATCH v3 " Ville Syrjala
2019-11-28 15:03     ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 13/14] drm/i915/fbc: Enable fbc by default on glk+ once again Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-27 20:12 ` [PATCH v2 14/14] drm/i915/fbc: Reallocate cfb if we need more of it Ville Syrjala
2019-11-27 20:12   ` [Intel-gfx] " Ville Syrjala
2019-11-28 15:48   ` Maarten Lankhorst
2019-11-28 15:48     ` [Intel-gfx] " Maarten Lankhorst
2019-11-28 15:59     ` Ville Syrjälä
2019-11-28 15:59       ` [Intel-gfx] " Ville Syrjälä
2019-11-29  8:48       ` Maarten Lankhorst
2019-11-29  8:48         ` [Intel-gfx] " Maarten Lankhorst
2019-11-29 11:37         ` Ville Syrjälä
2019-11-29 11:37           ` [Intel-gfx] " Ville Syrjälä
2019-12-03  8:45           ` Maarten Lankhorst
2019-12-03  8:45             ` [Intel-gfx] " Maarten Lankhorst
2019-12-03 13:04             ` Ville Syrjälä [this message]
2019-12-09 14:17     ` Ville Syrjälä
2019-11-27 23:15 ` ✗ Fi.CI.BAT: failure for drm/i915/fbc: Fix FBC for glk+ (rev4) Patchwork
2019-11-27 23:15   ` [Intel-gfx] " Patchwork
2019-11-28  1:33 ` [PATCH v2 00/14] drm/i915/fbc: Fix FBC for glk+ Daniel Drake
2019-11-28  1:33   ` [Intel-gfx] " Daniel Drake
2019-11-28 18:02 ` ✓ Fi.CI.BAT: success for drm/i915/fbc: Fix FBC for glk+ (rev5) Patchwork
2019-11-28 18:02   ` [Intel-gfx] " Patchwork
2019-11-29 23:51 ` ✓ Fi.CI.IGT: " Patchwork
2019-11-29 23:51   ` [Intel-gfx] " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191203130448.GO1208@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=drake@endlessm.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jian-hong@endlessm.com \
    --cc=maarten.lankhorst@linux.intel.com \
    --cc=paulo.r.zanoni@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox