From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only
Date: Thu, 2 Jan 2020 10:28:45 -0800 [thread overview]
Message-ID: <20200102182845.GB11904@intel.com> (raw)
In-Reply-To: <20191231140007.31728-1-kai.vehmanen@linux.intel.com>
On Tue, Dec 31, 2019 at 04:00:07PM +0200, Kai Vehmanen wrote:
> Revert changes done in commit f6ec9483091f ("drm/i915: extend audio
> CDCLK>=2*BCLK constraint to more platforms"). Audio drivers
> communicate with i915 over HDA bus multiple times during system
> boot-up and each of these transactions result in matching
> get_power/put_power calls to i915, and depending on the platform,
> a modeset change causing visible flicker.
>
> GLK is the only platform with minimum CDCLK significantly lower
> than BCLK, and thus for GLK setting a higher CDCLK is mandatory.
>
> For other platforms, minimum CDCLK is close but below 2*BCLK
> (e.g. on ICL, CDCLK=176.4kHz with BCLK=96kHz). Spec-wise the constraint
> should be set, but in practise no communication errors have been
> reported and the downside if set is the flicker observed at boot-time.
>
> Revert to old behaviour until better mechanism to manage
> probe-time clocks is available.
>
> The full CDCLK>=2*BCLK constraint is still enforced at pipe
> enable time in intel_crtc_compute_min_cdclk().
>
> Bugzilla: https://gitlab.freedesktop.org/drm/intel/issues/913
> Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
> ---
>
> Notes:
> v2: d'oh, change put_power() as well
>
> drivers/gpu/drm/i915/display/intel_audio.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_audio.c b/drivers/gpu/drm/i915/display/intel_audio.c
> index 27710098d056..e406719a6716 100644
> --- a/drivers/gpu/drm/i915/display/intel_audio.c
> +++ b/drivers/gpu/drm/i915/display/intel_audio.c
> @@ -856,7 +856,7 @@ static unsigned long i915_audio_component_get_power(struct device *kdev)
> }
>
> /* Force CDCLK to 2*BCLK as long as we need audio powered. */
> - if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> + if (IS_GEMINILAKE(dev_priv))
I believe for correctness we should at least say this is for display_10 but
since we don't have display gen defined probably the right thing to do here
is to at least replace this per:
IS_GEN(dev_priv, 10) || IS_GEMINILAKE(dev_priv)
> glk_force_audio_cdclk(dev_priv, true);
>
> if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> @@ -875,7 +875,7 @@ static void i915_audio_component_put_power(struct device *kdev,
>
> /* Stop forcing CDCLK to 2*BCLK if no need for audio to be powered. */
> if (--dev_priv->audio_power_refcount == 0)
> - if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv))
> + if (IS_GEMINILAKE(dev_priv))
> glk_force_audio_cdclk(dev_priv, false);
>
> intel_display_power_put(dev_priv, POWER_DOMAIN_AUDIO, cookie);
> --
> 2.17.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2020-01-02 18:28 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-12-31 14:00 [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only Kai Vehmanen
2019-12-31 14:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only (rev2) Patchwork
2019-12-31 20:06 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-01-02 18:28 ` Rodrigo Vivi [this message]
2020-01-03 15:28 ` [Intel-gfx] [PATCH v2] drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only Kai Vehmanen
2020-01-06 16:49 ` Matt Roper
2020-03-06 16:45 ` Kai Vehmanen
2020-03-09 10:54 ` Takashi Iwai
2020-03-10 11:20 ` Kai Vehmanen
2020-03-10 13:41 ` Ville Syrjälä
2020-03-10 17:18 ` Kai Vehmanen
2020-03-10 18:25 ` Ville Syrjälä
2020-03-10 19:13 ` Takashi Iwai
2020-03-11 12:16 ` Kai Vehmanen
[not found] ` <s5hk13q7uf6.wl-tiwai@suse.de>
2020-03-11 17:04 ` Kai Vehmanen
2020-03-11 17:21 ` Takashi Iwai
2020-03-12 17:27 ` Kai Vehmanen
2020-03-12 17:48 ` Ville Syrjälä
2020-03-12 17:50 ` Ville Syrjälä
2020-03-13 14:54 ` Kai Vehmanen
2020-03-11 20:12 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Limit audio CDCLK>=2*BCLK constraint back to GLK only (rev3) Patchwork
2020-03-11 20:37 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-12 13:05 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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