Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v16 7/7] drm/i915: Update dbuf slices only with full modeset
Date: Fri, 31 Jan 2020 17:10:31 +0200	[thread overview]
Message-ID: <20200131151031.GS13686@intel.com> (raw)
In-Reply-To: <20200128233706.GI22783@mdroper-desk1.amr.corp.intel.com>

On Tue, Jan 28, 2020 at 03:37:06PM -0800, Matt Roper wrote:
> On Fri, Jan 24, 2020 at 10:44:56AM +0200, Stanislav Lisovskiy wrote:
> > During full modeset, global state(i.e dev_priv) is protected
> > by locking the crtcs in state, otherwise global state is not
> > serialized. Also if it is not a full modeset, we anyway
> > don't need to change DBuf slice configuration as Pipe configuration
> > doesn't change.
> 
> Looks correct, but don't we need this earlier so that we don't have a
> bad bisection point in the git history (assuming we rely on this rather
> than the extra locking from the previous patch to cover the DC off
> race)?

Could perhaps just squash into the patch that moves these calls here.
Or move just after that patch in the series.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> 
> 
> Matt
> 
> > 
> > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 6 ++++--
> >  1 file changed, 4 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 1c957df5c28c..888a9e94032e 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -15373,7 +15373,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
> >  		intel_encoders_update_prepare(state);
> >  
> >  	/* Enable all new slices, we might need */
> > -	icl_dbuf_slice_pre_update(state);
> > +	if (state->modeset)
> > +		icl_dbuf_slice_pre_update(state);
> >  
> >  	/* Now enable the clocks, plane, pipe, and connectors that we set up. */
> >  	dev_priv->display.commit_modeset_enables(state);
> > @@ -15432,7 +15433,8 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
> >  	}
> >  
> >  	/* Disable all slices, we don't need */
> > -	icl_dbuf_slice_post_update(state);
> > +	if (state->modeset)
> > +		icl_dbuf_slice_post_update(state);
> >  
> >  	for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
> >  		intel_post_plane_update(state, crtc);
> > -- 
> > 2.24.1.485.gad05a3d8e5
> > 
> 
> -- 
> Matt Roper
> Graphics Software Engineer
> VTT-OSGC Platform Enablement
> Intel Corporation
> (916) 356-2795

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-01-31 15:10 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-24  8:44 [Intel-gfx] [PATCH v16 0/7] Enable second DBuf slice for ICL and TGL Stanislav Lisovskiy
2020-01-24  8:44 ` [Intel-gfx] [PATCH v16 1/7] drm/i915: Remove skl_ddl_allocation struct Stanislav Lisovskiy
2020-01-24  8:44 ` [Intel-gfx] [PATCH v16 2/7] drm/i915: Move dbuf slice update to proper place Stanislav Lisovskiy
2020-01-24  8:44 ` [Intel-gfx] [PATCH v16 3/7] drm/i915: Introduce parameterized DBUF_CTL Stanislav Lisovskiy
2020-01-28 17:35   ` Ville Syrjälä
2020-01-29  8:41     ` Lisovskiy, Stanislav
2020-01-29 11:47       ` Ville Syrjälä
2020-01-24  8:44 ` [Intel-gfx] [PATCH v16 4/7] drm/i915: Manipulate DBuf slices properly Stanislav Lisovskiy
2020-01-24  8:44 ` [Intel-gfx] [PATCH v16 5/7] drm/i915: Correctly map DBUF slices to pipes Stanislav Lisovskiy
2020-01-28 23:15   ` Matt Roper
2020-01-28 23:38     ` Matt Roper
2020-01-29  9:03     ` Lisovskiy, Stanislav
2020-01-24  8:44 ` [Intel-gfx] [PATCH v16 6/7] drm/i915: Protect intel_dbuf_slices_update with mutex Stanislav Lisovskiy
2020-01-28 23:33   ` Matt Roper
2020-01-29  9:22     ` Lisovskiy, Stanislav
2020-01-31 15:22     ` Ville Syrjälä
2020-01-24  8:44 ` [Intel-gfx] [PATCH v16 7/7] drm/i915: Update dbuf slices only with full modeset Stanislav Lisovskiy
2020-01-28 23:37   ` Matt Roper
2020-01-31 15:10     ` Ville Syrjälä [this message]
2020-01-24  9:52 ` [Intel-gfx] ✓ Fi.CI.BAT: success for Enable second DBuf slice for ICL and TGL (rev21) Patchwork
2020-01-26  9:19 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-01-27  7:48   ` Lisovskiy, Stanislav
2020-01-27 12:29     ` Peres, Martin
2020-01-27 13:01 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2020-01-27 13:07 ` Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200131151031.GS13686@intel.com \
    --to=ville.syrjala@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=matthew.d.roper@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox