From: Matt Atwood <matthew.s.atwood@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915: Program MBUS with rmw during initialization
Date: Thu, 20 Feb 2020 12:44:47 -0500 [thread overview]
Message-ID: <20200220174447.GA5984@msatwood-mobl> (raw)
In-Reply-To: <20200204011032.582737-1-matthew.d.roper@intel.com>
On Mon, Feb 03, 2020 at 05:10:31PM -0800, Matt Roper wrote:
> It wasn't terribly clear from the bspec's wording, but after discussion
> with the hardware folks, it turns out that we need to preserve the
> pre-existing contents of the MBUS ABOX control register when
> initializing a few specific bits.
>
> Bspec: 49213
> Bspec: 50096
> Fixes: 4cb4585e5a7f ("drm/i915/icl: initialize MBus during display init")
> Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Reviewed-by: Matt Atwood <matthew.s.atwood@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_power.c | 14 +++++++++-----
> 1 file changed, 9 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 6d91e180db99..529319c962e8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -4504,14 +4504,18 @@ static void icl_dbuf_disable(struct drm_i915_private *dev_priv)
>
> static void icl_mbus_init(struct drm_i915_private *dev_priv)
> {
> - u32 val;
> + u32 mask, val;
>
> + mask = MBUS_ABOX_BT_CREDIT_POOL1_MASK |
> + MBUS_ABOX_BT_CREDIT_POOL2_MASK |
> + MBUS_ABOX_B_CREDIT_MASK |
> + MBUS_ABOX_BW_CREDIT_MASK;
> val = MBUS_ABOX_BT_CREDIT_POOL1(16) |
> - MBUS_ABOX_BT_CREDIT_POOL2(16) |
> - MBUS_ABOX_B_CREDIT(1) |
> - MBUS_ABOX_BW_CREDIT(1);
> + MBUS_ABOX_BT_CREDIT_POOL2(16) |
> + MBUS_ABOX_B_CREDIT(1) |
> + MBUS_ABOX_BW_CREDIT(1);
>
> - intel_de_write(dev_priv, MBUS_ABOX_CTL, val);
> + intel_de_rmw(dev_priv, MBUS_ABOX_CTL, mask, val);
> }
>
> static void hsw_assert_cdclk(struct drm_i915_private *dev_priv)
> --
> 2.24.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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prev parent reply other threads:[~2020-02-20 20:44 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-04 1:10 [Intel-gfx] [PATCH 1/2] drm/i915: Program MBUS with rmw during initialization Matt Roper
2020-02-04 1:10 ` [Intel-gfx] [PATCH 2/2] drm/i915/tgl: Program MBUS_ABOX{1, 2}_CTL during display init Matt Roper
2020-02-20 17:46 ` Matt Atwood
2020-02-04 23:40 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] drm/i915: Program MBUS with rmw during initialization Patchwork
2020-02-05 0:11 ` Matt Roper
2020-02-05 0:16 ` Chris Wilson
2020-02-10 22:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Program MBUS with rmw during initialization (rev2) Patchwork
2020-02-20 21:22 ` Matt Roper
2020-02-20 17:44 ` Matt Atwood [this message]
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