From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH] drm/i915: properly sanity check batch_start_offset
Date: Wed, 4 Mar 2020 20:51:43 +0000 [thread overview]
Message-ID: <20200304205143.106693-1-matthew.auld@intel.com> (raw)
Check the edge case where batch_start_offset sits exactly on the batch
size.
Testcase: igt/gem_exec_params/invalid-batch-start-offset
Fixes: 0b5372727be3 ("drm/i915/cmdparser: Use cached vmappings")
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 7bb27f382af7..5247de18a3d0 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -2714,7 +2714,8 @@ i915_gem_do_execbuffer(struct drm_device *dev,
goto err_vma;
}
- if (range_overflows_t(u64,
+ if (eb.batch_start_offset == eb.batch->vma->size ||
+ range_overflows_t(u64,
eb.batch_start_offset, eb.batch_len,
eb.batch->vma->size)) {
drm_dbg(&i915->drm, "Attempting to use out-of-bounds batch\n");
--
2.20.1
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next reply other threads:[~2020-03-04 20:51 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-04 20:51 Matthew Auld [this message]
2020-03-05 12:07 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: properly sanity check batch_start_offset Patchwork
2020-03-05 12:10 ` [Intel-gfx] [PATCH] " Mika Kuoppala
2020-03-05 12:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2020-03-06 1:27 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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