From: Manasi Navare <manasi.d.navare@intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 04/13] drm/i915: Move icl_get_trans_port_sync_config() into the DDI code
Date: Wed, 18 Mar 2020 15:44:16 -0700 [thread overview]
Message-ID: <20200318224415.GD6675@intel.com> (raw)
In-Reply-To: <20200313164831.5980-5-ville.syrjala@linux.intel.com>
On Fri, Mar 13, 2020 at 06:48:22PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Move the port sync readout into the DDI code where it belongs.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Manasi Navare <manasi.d.navare@intel.com>
Manasi
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 54 ++++++++++++++++++
> drivers/gpu/drm/i915/display/intel_display.c | 59 --------------------
> 2 files changed, 54 insertions(+), 59 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 8d486282eea3..39f3e9452aad 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3844,6 +3844,57 @@ void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
> crtc_state->min_voltage_level = 2;
> }
>
> +static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_priv,
> + enum transcoder cpu_transcoder)
> +{
> + u32 ctl2, master_select;
> +
> + ctl2 = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL2(cpu_transcoder));
> +
> + if ((ctl2 & PORT_SYNC_MODE_ENABLE) == 0)
> + return INVALID_TRANSCODER;
> +
> + master_select = ctl2 & PORT_SYNC_MODE_MASTER_SELECT_MASK;
> +
> + if (master_select == 0)
> + return TRANSCODER_EDP;
> + else
> + return master_select - 1;
> +}
> +
> +static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> + u32 transcoders = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
> + BIT(TRANSCODER_C) | BIT(TRANSCODER_D);
> + enum transcoder cpu_transcoder;
> +
> + crtc_state->master_transcoder =
> + transcoder_master_readout(dev_priv, crtc_state->cpu_transcoder);
> +
> + for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {
> + enum intel_display_power_domain power_domain;
> + intel_wakeref_t trans_wakeref;
> +
> + power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
> + trans_wakeref = intel_display_power_get_if_enabled(dev_priv,
> + power_domain);
> +
> + if (!trans_wakeref)
> + continue;
> +
> + if (transcoder_master_readout(dev_priv, cpu_transcoder) ==
> + crtc_state->cpu_transcoder)
> + crtc_state->sync_mode_slaves_mask |= BIT(cpu_transcoder);
> +
> + intel_display_power_put(dev_priv, power_domain, trans_wakeref);
> + }
> +
> + drm_WARN_ON(&dev_priv->drm,
> + crtc_state->master_transcoder != INVALID_TRANSCODER &&
> + crtc_state->sync_mode_slaves_mask);
> +}
> +
> void intel_ddi_get_config(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config)
> {
> @@ -3995,6 +4046,9 @@ void intel_ddi_get_config(struct intel_encoder *encoder,
> intel_read_infoframe(encoder, pipe_config,
> HDMI_INFOFRAME_TYPE_DRM,
> &pipe_config->infoframes.drm);
> +
> + if (INTEL_GEN(dev_priv) >= 11)
> + icl_get_trans_port_sync_config(pipe_config);
> }
>
> static enum intel_output_type
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 12823d8f6afe..5c5a131db8b4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -11049,61 +11049,6 @@ static void hsw_get_ddi_port_state(struct intel_crtc *crtc,
> }
> }
>
> -static enum transcoder transcoder_master_readout(struct drm_i915_private *dev_priv,
> - enum transcoder cpu_transcoder)
> -{
> - u32 trans_port_sync, master_select;
> -
> - trans_port_sync = intel_de_read(dev_priv,
> - TRANS_DDI_FUNC_CTL2(cpu_transcoder));
> -
> - if ((trans_port_sync & PORT_SYNC_MODE_ENABLE) == 0)
> - return INVALID_TRANSCODER;
> -
> - master_select = trans_port_sync &
> - PORT_SYNC_MODE_MASTER_SELECT_MASK;
> - if (master_select == 0)
> - return TRANSCODER_EDP;
> - else
> - return master_select - 1;
> -}
> -
> -static void icl_get_trans_port_sync_config(struct intel_crtc_state *crtc_state)
> -{
> - struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
> - u32 transcoders;
> - enum transcoder cpu_transcoder;
> -
> - crtc_state->master_transcoder = transcoder_master_readout(dev_priv,
> - crtc_state->cpu_transcoder);
> -
> - transcoders = BIT(TRANSCODER_A) |
> - BIT(TRANSCODER_B) |
> - BIT(TRANSCODER_C) |
> - BIT(TRANSCODER_D);
> - for_each_cpu_transcoder_masked(dev_priv, cpu_transcoder, transcoders) {
> - enum intel_display_power_domain power_domain;
> - intel_wakeref_t trans_wakeref;
> -
> - power_domain = POWER_DOMAIN_TRANSCODER(cpu_transcoder);
> - trans_wakeref = intel_display_power_get_if_enabled(dev_priv,
> - power_domain);
> -
> - if (!trans_wakeref)
> - continue;
> -
> - if (transcoder_master_readout(dev_priv, cpu_transcoder) ==
> - crtc_state->cpu_transcoder)
> - crtc_state->sync_mode_slaves_mask |= BIT(cpu_transcoder);
> -
> - intel_display_power_put(dev_priv, power_domain, trans_wakeref);
> - }
> -
> - drm_WARN_ON(&dev_priv->drm,
> - crtc_state->master_transcoder != INVALID_TRANSCODER &&
> - crtc_state->sync_mode_slaves_mask);
> -}
> -
> static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> struct intel_crtc_state *pipe_config)
> {
> @@ -11235,10 +11180,6 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> pipe_config->pixel_multiplier = 1;
> }
>
> - if (INTEL_GEN(dev_priv) >= 11 &&
> - !transcoder_is_dsi(pipe_config->cpu_transcoder))
> - icl_get_trans_port_sync_config(pipe_config);
> -
> out:
> for_each_power_domain(power_domain, power_domain_mask)
> intel_display_power_put(dev_priv,
> --
> 2.24.1
>
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next prev parent reply other threads:[~2020-03-18 22:42 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-13 16:48 [Intel-gfx] [PATCH 00/13] drm/i915: Port sync for skl+ Ville Syrjala
2020-03-13 16:48 ` [Intel-gfx] [PATCH 01/13] drm/i915/mst: Use .compute_config_late() to compute master transcoder Ville Syrjala
2020-03-20 23:37 ` Souza, Jose
2020-03-20 23:54 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 02/13] drm/i915: Move TRANS_DDI_FUNC_CTL2 programming where it belongs Ville Syrjala
2020-03-18 22:34 ` Manasi Navare
2020-03-19 13:20 ` Ville Syrjälä
2020-03-20 18:36 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 03/13] drm/i915: Drop usless master_transcoder assignments Ville Syrjala
2020-03-18 22:37 ` Manasi Navare
2020-03-19 13:22 ` Ville Syrjälä
2020-03-20 23:12 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 04/13] drm/i915: Move icl_get_trans_port_sync_config() into the DDI code Ville Syrjala
2020-03-18 22:44 ` Manasi Navare [this message]
2020-03-13 16:48 ` [Intel-gfx] [PATCH 05/13] drm/i915: Use REG_FIELD_PREP() & co. for TRANS_DDI_FUNC_CTL2 Ville Syrjala
2020-03-18 22:53 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 06/13] drm/i915: Include port sync state in the state dump Ville Syrjala
2020-03-18 23:00 ` Manasi Navare
2020-03-27 17:15 ` Ville Syrjälä
2020-03-13 16:48 ` [Intel-gfx] [PATCH 07/13] drm/i915: Store cpu_transcoder_mask in device info Ville Syrjala
2020-03-18 17:02 ` [Intel-gfx] [PATCH v2 " Ville Syrjala
2020-04-02 0:59 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 08/13] drm/i915: Implement port sync for SKL+ Ville Syrjala
2020-03-18 23:32 ` Manasi Navare
2020-03-13 16:48 ` [Intel-gfx] [PATCH 09/13] drm/i915: Eliminate port sync copy pasta Ville Syrjala
2020-04-02 1:25 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 10/13] drm/i915: Fix port sync code to work with >2 pipes Ville Syrjala
2020-04-03 0:32 ` Souza, Jose
2020-04-03 17:25 ` Ville Syrjälä
2020-03-13 16:48 ` [Intel-gfx] [PATCH 11/13] drm/i915: Do pipe updates after enables for everyone Ville Syrjala
2020-04-03 0:44 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 12/13] drm/i915: Pass atomic state to encoder hooks Ville Syrjala
2020-04-02 1:18 ` Souza, Jose
2020-03-13 16:48 ` [Intel-gfx] [PATCH 13/13] drm/i915: Move the port sync DP_TP_CTL stuff to the encoder hook Ville Syrjala
2020-04-03 0:59 ` Souza, Jose
2020-03-16 14:43 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915: Port sync for skl+ Patchwork
2020-03-18 18:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev2) Patchwork
2020-03-18 18:57 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-03-18 21:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Port sync for skl+ (rev3) Patchwork
2020-03-18 22:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-03-19 0:19 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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