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From: Andi Shyti <andi@etezian.org>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915/gt: Prefer soft-rc6 over RPS DOWN_TIMEOUT
Date: Fri, 24 Apr 2020 17:30:35 +0300	[thread overview]
Message-ID: <20200424143035.GA478530@jack.zhora.eu> (raw)
In-Reply-To: <158773545156.27391.13050238109113756223@build.alporthouse.com>

Hi Chris,

> > On Wed, Apr 22, 2020 at 01:17:01AM +0100, Chris Wilson wrote:
> > > The RPS DOWN_TIMEOUT interrupt is signaled after a period of rc6, and
> > > upon receipt of that interrupt we reprogram the GPU clocks down to the
> > > next idle notch [to help convserve power during rc6]. However, on
> > > execlists, we benefit from soft-rc6 immediately parking the GPU and
> > > setting idle frequencies upon idling [within a jiffie], and here the
> > > interrupt prevents us from restarting from our last frequency.
> > > 
> > > In the process, we can simply opt for a static pm_events mask and rely
> > > on the enable/disable interrupts to flush the worker on parking.
> > > 
> > > This will reduce the amount of oscillation observed during steady
> > > workloads with microsleeps, as each time the rc6 timeout occurs we
> > > immediately follow with a waitboost for a dropped frame.
> > > 
> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > ---
> > >  drivers/gpu/drm/i915/gt/intel_rps.c | 41 +++++++++++++----------------
> > >  1 file changed, 18 insertions(+), 23 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> > > index 4dcfae16a7ce..785cd58fba76 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> > > +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> > > @@ -57,7 +57,7 @@ static u32 rps_pm_mask(struct intel_rps *rps, u8 val)
> > >       if (val < rps->max_freq_softlimit)
> > >               mask |= GEN6_PM_RP_UP_EI_EXPIRED | GEN6_PM_RP_UP_THRESHOLD;
> > >  
> > > -     mask &= READ_ONCE(rps->pm_events);
> > > +     mask &= rps->pm_events;
> > 
> > we are giving up the read/write ordering here because we thing
> > that removing the down interval we won't have anymore
> > inconsistent reads?
> 
> Correct. Since we are now only setting rps->pm_events during
> initialisation, it remains constant at runtime, and we do not need to
> worry about read tearing or repeated reads.

Thanks!

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Andi
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      reply	other threads:[~2020-04-24 14:30 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-22  0:17 [Intel-gfx] [PATCH 1/3] drm/i915/gt: Prefer soft-rc6 over RPS DOWN_TIMEOUT Chris Wilson
2020-04-22  0:17 ` [Intel-gfx] [PATCH 2/3] drm/i915/gt: Trace RPS events Chris Wilson
2020-04-24 13:03   ` Andi Shyti
2020-04-22  0:17 ` [Intel-gfx] [PATCH 3/3] drm/i915/gt: Use the RPM config register to determine clk frequencies Chris Wilson
2020-04-22  0:49 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/gt: Prefer soft-rc6 over RPS DOWN_TIMEOUT Patchwork
2020-04-22  1:14 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-04-22 17:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915/gt: Prefer soft-rc6 over RPS DOWN_TIMEOUT (rev2) Patchwork
2020-04-22 18:17 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-04-24 12:50 ` [Intel-gfx] [PATCH 1/3] drm/i915/gt: Prefer soft-rc6 over RPS DOWN_TIMEOUT Andi Shyti
2020-04-24 13:37   ` Chris Wilson
2020-04-24 14:30     ` Andi Shyti [this message]

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