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From: Andi Shyti <andi.shyti@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 7/9] drm/i915/gt: Switch to manual evaluation of RPS
Date: Mon, 27 Apr 2020 19:39:02 +0300	[thread overview]
Message-ID: <20200427163902.GD1862@intel.intel> (raw)
In-Reply-To: <20200427085408.13879-7-chris@chris-wilson.co.uk>

Hi Chris,

On Mon, Apr 27, 2020 at 09:54:06AM +0100, Chris Wilson wrote:
> As with the realisation for soft-rc6, we respond to idling the engines
> within microseconds, far faster than the response times for HW RC6 and
> RPS. Furthermore, our fast parking upon idle, prevents HW RPS from
> running for many desktop workloads, as the RPS evaluation intervals are
> on the order of tens of milliseconds, but the typical workload is just a
> couple of milliseconds, but yet we still need to determine the best
> frequency for user latency versus power.
> 
> Recognising that the HW evaluation intervals are a poor fit, and that
> they were deprecated [in bspec at least] from gen10, start to wean
> ourselves off them and replace the EI with a timer and our accurate
> busy-stats. The principle benefit of manually evaluating RPS intervals
> is that we can be more responsive for better performance and powersaving
> for both spiky workloads and steady-state.
> 
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/1698
> Fixes: 98479ada421a ("drm/i915/gt: Treat idling as a RPS downclock event")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Andi Shyti <andi.shyti@intel.com>

Reviewed-by: Andi Shyti <andi.shyti@intel.com>

Thanks,
Andi
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  reply	other threads:[~2020-04-27 16:39 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-27  8:54 [Intel-gfx] [PATCH 1/9] drm/i915/gt: Sanitize GT first Chris Wilson
2020-04-27  8:54 ` [Intel-gfx] [PATCH 2/9] drm/i915/gt: Fix up clock frequency Chris Wilson
2020-04-27 19:52   ` Andi Shyti
2020-04-27 20:03     ` Chris Wilson
2020-04-27  8:54 ` [Intel-gfx] [PATCH 3/9] drm/i915/execlists: Check preempt-timeout target before submit_ports Chris Wilson
2020-04-27  8:54 ` [Intel-gfx] [PATCH 4/9] drm/i915/gt: Always enable busy-stats for execlists Chris Wilson
2020-04-27  8:54 ` [Intel-gfx] [PATCH 5/9] drm/i915/gt: Move rps.enabled/active to flags Chris Wilson
2020-04-27 19:53   ` Andi Shyti
2020-04-27  8:54 ` [Intel-gfx] [PATCH 6/9] drm/i915/gt: Track use of RPS interrupts in flags Chris Wilson
2020-04-27  8:54 ` [Intel-gfx] [PATCH 7/9] drm/i915/gt: Switch to manual evaluation of RPS Chris Wilson
2020-04-27 16:39   ` Andi Shyti [this message]
2020-04-27  8:54 ` [Intel-gfx] [PATCH 8/9] drm/i915/gt: Apply the aggressive downclocking to parking Chris Wilson
2020-04-27 20:38   ` Andi Shyti
2020-04-27  8:54 ` [Intel-gfx] [PATCH 9/9] drm/i915/gt: Restore aggressive post-boost downclocking Chris Wilson
2020-04-27 12:40   ` Chris Wilson
2020-04-27 17:06     ` Chris Wilson
2020-04-27 20:42       ` Andi Shyti
2020-04-27  9:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/9] drm/i915/gt: Sanitize GT first Patchwork
2020-04-27  9:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-04-27 10:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-04-27 11:10 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-04-27 19:51 ` [Intel-gfx] [PATCH 1/9] " Andi Shyti

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