Re: [Intel-gfx] [PATCH v27 2/6] drm/i915: Separate icl and skl SAGV checking

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Wed, May 06, 2020 at 10:55:44AM +0300, Lisovskiy, Stanislav wrote:
> On Tue, May 05, 2020 at 01:42:46PM +0300, Ville Syrjälä wrote:
> > On Tue, May 05, 2020 at 01:22:43PM +0300, Stanislav Lisovskiy wrote:
> > > Introduce platform dependent SAGV checking in
> > > combination with bandwidth state pipe SAGV mask.
> > > 
> > > v2, v3, v4, v5, v6: Fix rebase conflict
> > > 
> > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_pm.c | 30 ++++++++++++++++++++++++++++--
> > >  1 file changed, 28 insertions(+), 2 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > > index da567fac7c93..c7d726a656b2 100644
> > > --- a/drivers/gpu/drm/i915/intel_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > > @@ -3853,6 +3853,24 @@ static bool intel_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state
> > >  	return true;
> > >  }
> > >  
> > > +static bool skl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
> > > +{
> > > +	struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state);
> > > +	/*
> > > +	 * SKL+ workaround: bspec recommends we disable SAGV when we have
> > > +	 * more then one pipe enabled
> > > +	 */
> > > +	if (hweight8(state->active_pipes) > 1)
> > > +		return false;
> > 
> > That stuff should no longer be here since we now have it done properly
> > in intel_can_eanble_sagv().
> > 
> > > +
> > > +	return intel_crtc_can_enable_sagv(crtc_state);
> > > +}
> > > +
> > > +static bool icl_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state)
> > > +{
> > > +	return intel_crtc_can_enable_sagv(crtc_state);
> > > +}
> > 
> > This looks the wrong way around. IMO intel_crtc_can_enable_sagv()
> > should rather call the skl vs. icl variants as needed. Although we
> > don't yet have the icl variant so the oerdering of the patches is
> > a bit weird.
> 
> This is done so, because icl and skl checking share the same code
> to check if SAGV can be enabled, except active_pipes > 1 thing.
> 
> So that icl and skl can share the same code avoiding duplicating,
> i.e if I put code from intel_crtc_can_enable_sagv to 
> skl_crtc_can_enable_sagv, I will have to 
> 1) either duplicate this code to icl_crtc_can_enable_sagv(if I add remaining active_pipes check to
> skl)
> 2) use skl_crtc_can_enable_sagv from icl_crtc_can_enable_sagv,
> but this active_pipes check will be still outside of this skl function,
> which I don't find nice - to me the best way is to keep all skl
> specific checks in a correspondent function.
> 
> So that is why I preferred to extract some common code to some separate
> universal function which can be then used from both icl and skl functions:
> from icl it is used "as is" and from skl it is intel_crtc_can_enable_sagv
> + this active_pipes check.
> 
> Currently anyway we of course have that active_pipes check in intel_can_enable_sagv
> i.e already outside of skl_crtc_can_enable_sagv(where it should be imo),
> so was your intention to leave it outside anyway?

My intention is that we eventually remove it altogeher. In the
meantime intel_can_enable_sagv() looks like the right place
for it.

-- 
Ville Syrjälä
Intel
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