From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH] drm/i915/tgl: Update TC DP vswing table
Date: Fri, 29 May 2020 16:27:57 -0700 [thread overview]
Message-ID: <20200529232757.37832-1-jose.souza@intel.com> (raw)
Small updates in dkl_de_emphasis_control field.
BSpec: 49292
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index aa22465bb56e..cd211f48c401 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -639,11 +639,11 @@ struct tgl_dkl_phy_ddi_buf_trans {
static const struct tgl_dkl_phy_ddi_buf_trans tgl_dkl_phy_dp_ddi_trans[] = {
/* VS pre-emp Non-trans mV Pre-emph dB */
{ 0x7, 0x0, 0x00 }, /* 0 0 400mV 0 dB */
- { 0x5, 0x0, 0x03 }, /* 0 1 400mV 3.5 dB */
- { 0x2, 0x0, 0x0b }, /* 0 2 400mV 6 dB */
+ { 0x5, 0x0, 0x05 }, /* 0 1 400mV 3.5 dB */
+ { 0x2, 0x0, 0x0B }, /* 0 2 400mV 6 dB */
{ 0x0, 0x0, 0x19 }, /* 0 3 400mV 9.5 dB */
{ 0x5, 0x0, 0x00 }, /* 1 0 600mV 0 dB */
- { 0x2, 0x0, 0x03 }, /* 1 1 600mV 3.5 dB */
+ { 0x2, 0x0, 0x08 }, /* 1 1 600mV 3.5 dB */
{ 0x0, 0x0, 0x14 }, /* 1 2 600mV 6 dB */
{ 0x2, 0x0, 0x00 }, /* 2 0 800mV 0 dB */
{ 0x0, 0x0, 0x0B }, /* 2 1 800mV 3.5 dB */
--
2.26.2
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next reply other threads:[~2020-05-29 23:26 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-29 23:27 José Roberto de Souza [this message]
2020-05-29 23:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Update TC DP vswing table Patchwork
2020-05-30 1:02 ` [Intel-gfx] [PATCH] " Almahallawy, Khaled
2020-05-30 4:56 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork
2020-06-01 17:54 ` Souza, Jose
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