From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Souza, Jose" <jose.souza@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 2/4] drm/i915: Don't do WaFbcTurnOffFbcWatermark for glk
Date: Thu, 9 Jul 2020 16:57:43 +0300 [thread overview]
Message-ID: <20200709135743.GA6112@intel.com> (raw)
In-Reply-To: <5493d75083c104576c360dbba02f44f3a9d37479.camel@intel.com>
On Thu, Jul 09, 2020 at 12:19:07AM +0000, Souza, Jose wrote:
> On Wed, 2020-07-08 at 16:12 +0300, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > GLK supposedly does not need WaFbcTurnOffFbcWatermark,
> > so let's not apply it.
>
> WA 0562 from BSpec 21664 says it applies to all GEN9 but it is probably referring to all display GEN9.
Yeah, and it doesn't show the GLK tag, nor does it show up if you
filter for GLK.
>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Thanks. Series pushed.
>
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 18 ++++++++++++++++--
> > 1 file changed, 16 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 63d1a4882727..8760e1ba1eee 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -94,10 +94,8 @@ static void gen9_init_clock_gating(struct drm_i915_private *dev_priv)
> > I915_WRITE(GEN8_CHICKEN_DCPR_1,
> > I915_READ(GEN8_CHICKEN_DCPR_1) | MASK_WAKEMEM);
> >
> > - /* WaFbcTurnOffFbcWatermark:skl,bxt,kbl,cfl */
> > /* WaFbcWakeMemOn:skl,bxt,kbl,glk,cfl */
> > I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
> > - DISP_FBC_WM_DIS |
> > DISP_FBC_MEMORY_WAKE);
> >
> > /* WaFbcHighMemBwCorruptionAvoidance:skl,bxt,kbl,cfl */
> > @@ -140,6 +138,10 @@ static void bxt_init_clock_gating(struct drm_i915_private *dev_priv)
> > * application, using batch buffers or any other means.
> > */
> > I915_WRITE(RM_TIMEOUT, MMIO_TIMEOUT_US(950));
> > +
> > + /* WaFbcTurnOffFbcWatermark:bxt */
> > + I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
> > + DISP_FBC_WM_DIS);
> > }
> >
> > static void glk_init_clock_gating(struct drm_i915_private *dev_priv)
> > @@ -7189,6 +7191,10 @@ static void cfl_init_clock_gating(struct drm_i915_private *dev_priv)
> > cnp_init_clock_gating(dev_priv);
> > gen9_init_clock_gating(dev_priv);
> >
> > + /* WaFbcTurnOffFbcWatermark:cfl */
> > + I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
> > + DISP_FBC_WM_DIS);
> > +
> > /* WaFbcNukeOnHostModify:cfl */
> > I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
> > ILK_DPFC_NUKE_ON_ANY_MODIFICATION);
> > @@ -7208,6 +7214,10 @@ static void kbl_init_clock_gating(struct drm_i915_private *dev_priv)
> > I915_WRITE(GEN6_UCGCTL1, I915_READ(GEN6_UCGCTL1) |
> > GEN6_GAMUNIT_CLOCK_GATE_DISABLE);
> >
> > + /* WaFbcTurnOffFbcWatermark:kbl */
> > + I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
> > + DISP_FBC_WM_DIS);
> > +
> > /* WaFbcNukeOnHostModify:kbl */
> > I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
> > ILK_DPFC_NUKE_ON_ANY_MODIFICATION);
> > @@ -7221,6 +7231,10 @@ static void skl_init_clock_gating(struct drm_i915_private *dev_priv)
> > I915_WRITE(FBC_LLC_READ_CTRL, I915_READ(FBC_LLC_READ_CTRL) |
> > FBC_LLC_FULLY_OPEN);
> >
> > + /* WaFbcTurnOffFbcWatermark:skl */
> > + I915_WRITE(DISP_ARB_CTL, I915_READ(DISP_ARB_CTL) |
> > + DISP_FBC_WM_DIS);
> > +
> > /* WaFbcNukeOnHostModify:skl */
> > I915_WRITE(ILK_DPFC_CHICKEN, I915_READ(ILK_DPFC_CHICKEN) |
> > ILK_DPFC_NUKE_ON_ANY_MODIFICATION);
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2020-07-09 13:57 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-08 13:12 [Intel-gfx] [PATCH 1/4] drm/i915: Move all FBC w/as to .init_clock_gating() Ville Syrjala
2020-07-08 13:12 ` [Intel-gfx] [PATCH 2/4] drm/i915: Don't do WaFbcTurnOffFbcWatermark for glk Ville Syrjala
2020-07-09 0:19 ` Souza, Jose
2020-07-09 13:57 ` Ville Syrjälä [this message]
2020-07-08 13:12 ` [Intel-gfx] [PATCH 3/4] drm/i915: Limit WaFbcHighMemBwCorruptionAvoidance to skl and bxt Ville Syrjala
2020-07-09 0:21 ` Souza, Jose
2020-07-08 13:12 ` [Intel-gfx] [PATCH 4/4] drm/i915: Document FBC related w/as more thoroughly Ville Syrjala
2020-07-09 0:27 ` Souza, Jose
2020-07-08 14:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Move all FBC w/as to .init_clock_gating() Patchwork
2020-07-08 17:14 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-07-09 0:01 ` [Intel-gfx] [PATCH 1/4] " Souza, Jose
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