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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v4 2/5] drm/i915/display: Remove port and phy from voltage swing functions
Date: Thu, 9 Jul 2020 17:12:24 +0300	[thread overview]
Message-ID: <20200709141224.GD6112@intel.com> (raw)
In-Reply-To: <20200708205512.21625-2-jose.souza@intel.com>

On Wed, Jul 08, 2020 at 01:55:09PM -0700, José Roberto de Souza wrote:
> This information can be get directly from intel_encoder so no need
> of those parameters.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 33 ++++++++++--------------
>  1 file changed, 14 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index e80319aa7cf0..2c484b55bcdf 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -815,8 +815,7 @@ static int skl_buf_trans_num_entries(enum port port, int n_entries)
>  }
>  
>  static const struct ddi_buf_trans *
> -intel_ddi_get_buf_trans_dp(struct intel_encoder *encoder,
> -			   enum port port, int *n_entries)
> +intel_ddi_get_buf_trans_dp(struct intel_encoder *encoder, int *n_entries)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  
> @@ -825,12 +824,12 @@ intel_ddi_get_buf_trans_dp(struct intel_encoder *encoder,
>  	    IS_COMETLAKE(dev_priv)) {
>  		const struct ddi_buf_trans *ddi_translations =
>  			kbl_get_buf_trans_dp(encoder, n_entries);
> -		*n_entries = skl_buf_trans_num_entries(port, *n_entries);
> +		*n_entries = skl_buf_trans_num_entries(encoder->port, *n_entries);
>  		return ddi_translations;
>  	} else if (IS_SKYLAKE(dev_priv)) {
>  		const struct ddi_buf_trans *ddi_translations =
>  			skl_get_buf_trans_dp(encoder, n_entries);
> -		*n_entries = skl_buf_trans_num_entries(port, *n_entries);
> +		*n_entries = skl_buf_trans_num_entries(encoder->port, *n_entries);
>  		return ddi_translations;
>  	} else if (IS_BROADWELL(dev_priv)) {
>  		*n_entries = ARRAY_SIZE(bdw_ddi_translations_dp);
> @@ -845,15 +844,14 @@ intel_ddi_get_buf_trans_dp(struct intel_encoder *encoder,
>  }
>  
>  static const struct ddi_buf_trans *
> -intel_ddi_get_buf_trans_edp(struct intel_encoder *encoder,
> -			    enum port port, int *n_entries)
> +intel_ddi_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
>  
>  	if (IS_GEN9_BC(dev_priv)) {
>  		const struct ddi_buf_trans *ddi_translations =
>  			skl_get_buf_trans_edp(encoder, n_entries);
> -		*n_entries = skl_buf_trans_num_entries(port, *n_entries);
> +		*n_entries = skl_buf_trans_num_entries(encoder->port, *n_entries);
>  		return ddi_translations;
>  	} else if (IS_BROADWELL(dev_priv)) {
>  		return bdw_get_buf_trans_edp(encoder, n_entries);
> @@ -1152,10 +1150,10 @@ static void intel_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
>  		ddi_translations = intel_ddi_get_buf_trans_fdi(dev_priv,
>  							       &n_entries);
>  	else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
> -		ddi_translations = intel_ddi_get_buf_trans_edp(encoder, port,
> +		ddi_translations = intel_ddi_get_buf_trans_edp(encoder,
>  							       &n_entries);
>  	else
> -		ddi_translations = intel_ddi_get_buf_trans_dp(encoder, port,
> +		ddi_translations = intel_ddi_get_buf_trans_dp(encoder,
>  							      &n_entries);
>  
>  	/* If we're boosting the current, set bit 31 of trans1 */
> @@ -2106,7 +2104,6 @@ static void skl_ddi_set_iboost(struct intel_encoder *encoder,
>  {
>  	struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> -	enum port port = encoder->port;
>  	u8 iboost;
>  
>  	if (type == INTEL_OUTPUT_HDMI)
> @@ -2122,11 +2119,9 @@ static void skl_ddi_set_iboost(struct intel_encoder *encoder,
>  			ddi_translations = intel_ddi_get_buf_trans_hdmi(encoder, &n_entries);
>  		else if (type == INTEL_OUTPUT_EDP)
>  			ddi_translations = intel_ddi_get_buf_trans_edp(encoder,
> -								       port,
>  								       &n_entries);
>  		else
>  			ddi_translations = intel_ddi_get_buf_trans_dp(encoder,
> -								      port,
>  								      &n_entries);
>  
>  		if (drm_WARN_ON_ONCE(&dev_priv->drm, !ddi_translations))
> @@ -2143,9 +2138,9 @@ static void skl_ddi_set_iboost(struct intel_encoder *encoder,
>  		return;
>  	}
>  
> -	_skl_ddi_set_iboost(dev_priv, port, iboost);
> +	_skl_ddi_set_iboost(dev_priv, encoder->port, iboost);
>  
> -	if (port == PORT_A && dig_port->max_lanes == 4)
> +	if (encoder->port == PORT_A && dig_port->max_lanes == 4)
>  		_skl_ddi_set_iboost(dev_priv, PORT_E, iboost);
>  }
>  
> @@ -2213,9 +2208,9 @@ static u8 intel_ddi_dp_voltage_max(struct intel_dp *intel_dp)
>  			bxt_get_buf_trans_dp(encoder, &n_entries);
>  	} else {
>  		if (encoder->type == INTEL_OUTPUT_EDP)
> -			intel_ddi_get_buf_trans_edp(encoder, port, &n_entries);
> +			intel_ddi_get_buf_trans_edp(encoder, &n_entries);
>  		else
> -			intel_ddi_get_buf_trans_dp(encoder, port, &n_entries);
> +			intel_ddi_get_buf_trans_dp(encoder, &n_entries);
>  	}
>  
>  	if (drm_WARN_ON(&dev_priv->drm, n_entries < 1))
> @@ -2370,10 +2365,10 @@ static void cnl_ddi_vswing_sequence(struct intel_encoder *encoder,
>  }
>  
>  static void icl_ddi_combo_vswing_program(struct intel_encoder *encoder,
> -					 u32 level, enum phy phy, int type,
> -					 int rate)
> +					 u32 level, int type, int rate)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	enum phy phy = intel_port_to_phy(dev_priv, encoder->port);
>  	const struct cnl_ddi_buf_trans *ddi_translations = NULL;
>  	u32 n_entries, val;
>  	int ln;
> @@ -2497,7 +2492,7 @@ static void icl_combo_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
>  	intel_de_write(dev_priv, ICL_PORT_TX_DW5_GRP(phy), val);
>  
>  	/* 5. Program swing and de-emphasis */
> -	icl_ddi_combo_vswing_program(encoder, level, phy, type, rate);
> +	icl_ddi_combo_vswing_program(encoder, level, type, rate);
>  
>  	/* 6. Set training enable to trigger update */
>  	val = intel_de_read(dev_priv, ICL_PORT_TX_DW5_LN0(phy));
> -- 
> 2.27.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2020-07-09 14:12 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-08 20:55 [Intel-gfx] [PATCH v4 1/5] drm/i915/display: Replace drm_i915_private in voltage swing functions by intel_encoder José Roberto de Souza
2020-07-08 20:55 ` [Intel-gfx] [PATCH v4 2/5] drm/i915/display: Remove port and phy from voltage swing functions José Roberto de Souza
2020-07-09 14:12   ` Ville Syrjälä [this message]
2020-07-08 20:55 ` [Intel-gfx] [PATCH v4 3/5] drm/i915/bios: Parse HOBL parameter José Roberto de Souza
2020-07-08 20:55 ` [Intel-gfx] [PATCH v4 4/5] drm/i915/display: Implement HOBL José Roberto de Souza
2020-07-09 14:24   ` Ville Syrjälä
2020-07-09 19:40     ` Souza, Jose
2020-07-10 11:56       ` Ville Syrjälä
2020-07-08 20:55 ` [Intel-gfx] [PATCH v4 5/5] DO_NOT_MERGE_IT: drm/i915/display: Enable HOBL by default José Roberto de Souza
2020-07-08 22:04 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v4,1/5] drm/i915/display: Replace drm_i915_private in voltage swing functions by intel_encoder Patchwork
2020-07-08 22:23 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-09  2:53 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-07-09 14:10 ` [Intel-gfx] [PATCH v4 1/5] " Ville Syrjälä
2020-07-09 16:34 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v4,1/5] drm/i915/display: Replace drm_i915_private in voltage swing functions by intel_encoder (rev2) Patchwork
2020-07-09 16:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-07-09 18:59 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-07-09 19:35   ` Souza, Jose

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