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From: Sean Paul <sean@poorly.run>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	juston.li@intel.com, jani.nikula@linux.intel.com,
	joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com,
	anshuman.gupta@intel.com
Cc: David Airlie <airlied@linux.ie>,
	daniel.vetter@ffwll.ch, Sean Paul <seanpaul@chromium.org>
Subject: [Intel-gfx] [PATCH v8 04/17] drm/i915: Intercept Aksv writes in the aux hooks
Date: Tue, 18 Aug 2020 11:38:52 -0400	[thread overview]
Message-ID: <20200818153910.27894-5-sean@poorly.run> (raw)
In-Reply-To: <20200818153910.27894-1-sean@poorly.run>

From: Sean Paul <seanpaul@chromium.org>

Instead of hand rolling the transfer ourselves in the hdcp hook, inspect
aux messages and add the aksv flag in the aux transfer hook.

IIRC, this was the original implementation and folks wanted this hack to
be isolated to the hdcp code, which makes sense.

However in testing an LG monitor on my desk, I noticed it was passing
back a DEFER reply. This wasn't handled in our hand-rolled code and HDCP
auth was failing as a result. Instead of copy/pasting all of the retry
logic and delays from drm dp helpers, let's just use the helpers and hide
the aksv select as best as we can.

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20191203173638.94919-3-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20191212190230.188505-5-sean@poorly.run #v2
Link: https://patchwork.freedesktop.org/patch/msgid/20200117193103.156821-5-sean@poorly.run #v3
Link: https://patchwork.freedesktop.org/patch/msgid/20200218220242.107265-5-sean@poorly.run #v4
Link: https://patchwork.freedesktop.org/patch/msgid/20200305201236.152307-5-sean@poorly.run #v5
Link: https://patchwork.freedesktop.org/patch/msgid/20200429195502.39919-5-sean@poorly.run #v6
Link: https://patchwork.freedesktop.org/patch/msgid/20200623155907.22961-5-sean@poorly.run #v7

Changes in v2:
-Remove 'generate' in intel_dp_aux_generate_xfer_flags, make arg const (Ville)
-Bundle Aksv if statement together (Ville)
-Rename 'txbuf' to 'aksv' (Ville)
Changes in v3:
-None
Changes in v4:
-None
Changes in v5:
-None
Changes in v6:
-None
Changes in v7:
-None
Changes in v8:
-None
---
 drivers/gpu/drm/i915/display/intel_dp.c | 62 ++++++++++++-------------
 1 file changed, 29 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 79c27f91f42c..7d1774bfbe41 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1563,6 +1563,20 @@ intel_dp_aux_header(u8 txbuf[HEADER_SIZE],
 	txbuf[3] = msg->size - 1;
 }
 
+static u32 intel_dp_aux_xfer_flags(const struct drm_dp_aux_msg *msg)
+{
+	/*
+	 * If we're trying to send the HDCP Aksv, we need to set a the Aksv
+	 * select bit to inform the hardware to send the Aksv after our header
+	 * since we can't access that data from software.
+	 */
+	if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_NATIVE_WRITE &&
+	    msg->address == DP_AUX_HDCP_AKSV)
+		return DP_AUX_CH_CTL_AUX_AKSV_SELECT;
+
+	return 0;
+}
+
 static ssize_t
 intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 {
@@ -1570,6 +1584,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
 	u8 txbuf[20], rxbuf[20];
 	size_t txsize, rxsize;
+	u32 flags = intel_dp_aux_xfer_flags(msg);
 	int ret;
 
 	intel_dp_aux_header(txbuf, msg);
@@ -1590,7 +1605,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 			memcpy(txbuf + HEADER_SIZE, msg->buffer, msg->size);
 
 		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
-					rxbuf, rxsize, 0);
+					rxbuf, rxsize, flags);
 		if (ret > 0) {
 			msg->reply = rxbuf[0] >> 4;
 
@@ -1613,7 +1628,7 @@ intel_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
 			return -E2BIG;
 
 		ret = intel_dp_aux_xfer(intel_dp, txbuf, txsize,
-					rxbuf, rxsize, 0);
+					rxbuf, rxsize, flags);
 		if (ret > 0) {
 			msg->reply = rxbuf[0] >> 4;
 			/*
@@ -6403,15 +6418,8 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
 				u8 *an)
 {
 	struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
-	struct intel_dp *intel_dp = enc_to_intel_dp(to_intel_encoder(&dig_port->base.base));
-	static const struct drm_dp_aux_msg msg = {
-		.request = DP_AUX_NATIVE_WRITE,
-		.address = DP_AUX_HDCP_AKSV,
-		.size = DRM_HDCP_KSV_LEN,
-	};
-	u8 txbuf[HEADER_SIZE + DRM_HDCP_KSV_LEN] = {}, rxbuf[2], reply = 0;
+	u8 aksv[DRM_HDCP_KSV_LEN] = {};
 	ssize_t dpcd_ret;
-	int ret;
 
 	/* Output An first, that's easy */
 	dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AN,
@@ -6424,31 +6432,19 @@ int intel_dp_hdcp_write_an_aksv(struct intel_digital_port *dig_port,
 	}
 
 	/*
-	 * Since Aksv is Oh-So-Secret, we can't access it in software. So in
-	 * order to get it on the wire, we need to create the AUX header as if
-	 * we were writing the data, and then tickle the hardware to output the
-	 * data once the header is sent out.
+	 * Since Aksv is Oh-So-Secret, we can't access it in software. So we
+	 * send an empty buffer of the correct length through the DP helpers. On
+	 * the other side, in the transfer hook, we'll generate a flag based on
+	 * the destination address which will tickle the hardware to output the
+	 * Aksv on our behalf after the header is sent.
 	 */
-	intel_dp_aux_header(txbuf, &msg);
-
-	ret = intel_dp_aux_xfer(intel_dp, txbuf, HEADER_SIZE + msg.size,
-				rxbuf, sizeof(rxbuf),
-				DP_AUX_CH_CTL_AUX_AKSV_SELECT);
-	if (ret < 0) {
-		drm_dbg_kms(&i915->drm,
-			    "Write Aksv over DP/AUX failed (%d)\n", ret);
-		return ret;
-	} else if (ret == 0) {
-		drm_dbg_kms(&i915->drm, "Aksv write over DP/AUX was empty\n");
-		return -EIO;
-	}
-
-	reply = (rxbuf[0] >> 4) & DP_AUX_NATIVE_REPLY_MASK;
-	if (reply != DP_AUX_NATIVE_REPLY_ACK) {
+	dpcd_ret = drm_dp_dpcd_write(&dig_port->dp.aux, DP_AUX_HDCP_AKSV,
+				     aksv, DRM_HDCP_KSV_LEN);
+	if (dpcd_ret != DRM_HDCP_KSV_LEN) {
 		drm_dbg_kms(&i915->drm,
-			    "Aksv write: no DP_AUX_NATIVE_REPLY_ACK %x\n",
-			    reply);
-		return -EIO;
+			    "Failed to write Aksv over DP/AUX (%zd)\n",
+			    dpcd_ret);
+		return dpcd_ret >= 0 ? -EIO : dpcd_ret;
 	}
 	return 0;
 }
-- 
Sean Paul, Software Engineer, Google / Chromium OS

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-08-18 15:39 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-08-18 15:38 [Intel-gfx] [PATCH v8 00/17] drm/i915: Add support for HDCP 1.4 over MST Sean Paul
2020-08-18 15:38 ` [Intel-gfx] [PATCH v8 01/17] drm/i915: Fix sha_text population code Sean Paul
2020-08-26 13:53   ` Sasha Levin
2020-08-18 15:38 ` [Intel-gfx] [PATCH v8 02/17] drm/i915: Clear the repeater bit on HDCP disable Sean Paul
2020-08-26 13:53   ` Sasha Levin
2020-08-18 15:38 ` [Intel-gfx] [PATCH v8 03/17] drm/i915: WARN if HDCP signalling is enabled upon disable Sean Paul
2020-08-18 15:38 ` Sean Paul [this message]
2020-08-18 15:38 ` [Intel-gfx] [PATCH v8 05/17] drm/i915: Use the cpu_transcoder in intel_hdcp to toggle HDCP signalling Sean Paul
2020-08-18 15:38 ` [Intel-gfx] [PATCH v8 06/17] drm/i915: Factor out hdcp->value assignments Sean Paul
2020-08-18 15:38 ` [Intel-gfx] [PATCH v8 07/17] drm/i915: Protect workers against disappearing connectors Sean Paul
2020-08-18 15:38 ` [Intel-gfx] [PATCH v8 08/17] drm/i915: Clean up intel_hdcp_disable Sean Paul
2020-08-18 15:38 ` [Intel-gfx] [PATCH v8 09/17] drm/i915: Don't fully disable HDCP on a port if multiple pipes are using it Sean Paul
2020-08-18 15:38 ` [Intel-gfx] [PATCH v8 10/17] drm/i915: Support DP MST in enc_to_dig_port() function Sean Paul
2020-08-18 15:38 ` [Intel-gfx] [PATCH v8 11/17] drm/i915: Use ddi_update_pipe in intel_dp_mst Sean Paul
2020-08-18 15:39 ` [Intel-gfx] [PATCH v8 12/17] drm/i915: Factor out HDCP shim functions from dp for use by dp_mst Sean Paul
2020-08-18 15:39 ` [Intel-gfx] [PATCH v8 13/17] drm/i915: Plumb port through hdcp init Sean Paul
2020-08-18 15:39 ` [Intel-gfx] [PATCH v8 14/17] drm/i915: Add connector to hdcp_shim->check_link() Sean Paul
2020-08-18 15:39 ` [Intel-gfx] [PATCH v8 15/17] drm/mst: Add support for QUERY_STREAM_ENCRYPTION_STATUS MST sideband message Sean Paul
2020-08-18 22:12   ` Lyude Paul
2020-08-19 14:31     ` [Intel-gfx] [PATCH v8.5] " Sean Paul
2020-08-18 15:39 ` [Intel-gfx] [PATCH v8 16/17] drm/i915: Print HDCP version info for all connectors Sean Paul
2020-08-18 15:39 ` [Intel-gfx] [PATCH v8 17/17] drm/i915: Add HDCP 1.4 support for MST connectors Sean Paul
2020-08-18 16:04 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for HDCP 1.4 over MST (rev2) Patchwork
2020-08-18 16:06 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-08-18 16:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-08-18 17:28 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-08-19 15:21 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Add support for HDCP 1.4 over MST (rev3) Patchwork
2020-08-19 15:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-08-19 15:38 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-08-20  7:24 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-09-01  7:39 ` [Intel-gfx] [PATCH v8 00/17] drm/i915: Add support for HDCP 1.4 over MST Ramalingam C

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