From: Lyude Paul <lyude@redhat.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
nouveau@lists.freedesktop.org
Cc: Thomas Zimmermann <tzimmermann@suse.de>,
David Airlie <airlied@linux.ie>,
Lucas De Marchi <lucas.demarchi@intel.com>,
open list <linux-kernel@vger.kernel.org>,
Maxime Ripard <mripard@kernel.org>,
Wambui Karuga <wambui.karugax@gmail.com>
Subject: [Intel-gfx] [RFC v4 09/20] drm/i915/dp: Extract drm_dp_has_mst()
Date: Tue, 25 Aug 2020 15:50:16 -0400 [thread overview]
Message-ID: <20200825195027.74681-10-lyude@redhat.com> (raw)
In-Reply-To: <20200825195027.74681-1-lyude@redhat.com>
Just a tiny drive-by cleanup, we can consolidate i915's code for
checking for MST support into a helper to be shared across drivers.
Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Sean Paul <sean@poorly.run>
---
drivers/gpu/drm/i915/display/intel_dp.c | 18 ++----------------
include/drm/drm_dp_mst_helper.h | 22 ++++++++++++++++++++++
2 files changed, 24 insertions(+), 16 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 79c27f91f42c0..1e29d3a012856 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -4699,20 +4699,6 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
return true;
}
-static bool
-intel_dp_sink_can_mst(struct intel_dp *intel_dp)
-{
- u8 mstm_cap;
-
- if (intel_dp->dpcd[DP_DPCD_REV] < 0x12)
- return false;
-
- if (drm_dp_dpcd_readb(&intel_dp->aux, DP_MSTM_CAP, &mstm_cap) != 1)
- return false;
-
- return mstm_cap & DP_MST_CAP;
-}
-
static bool
intel_dp_can_mst(struct intel_dp *intel_dp)
{
@@ -4720,7 +4706,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)
return i915->params.enable_dp_mst &&
intel_dp->can_mst &&
- intel_dp_sink_can_mst(intel_dp);
+ drm_dp_has_mst(&intel_dp->aux, intel_dp->dpcd);
}
static void
@@ -4729,7 +4715,7 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
struct intel_encoder *encoder =
&dp_to_dig_port(intel_dp)->base;
- bool sink_can_mst = intel_dp_sink_can_mst(intel_dp);
+ bool sink_can_mst = drm_dp_has_mst(&intel_dp->aux, intel_dp->dpcd);
drm_dbg_kms(&i915->drm,
"[ENCODER:%d:%s] MST support: port: %s, sink: %s, modparam: %s\n",
diff --git a/include/drm/drm_dp_mst_helper.h b/include/drm/drm_dp_mst_helper.h
index 8b9eb4db3381c..2d8983a713e8c 100644
--- a/include/drm/drm_dp_mst_helper.h
+++ b/include/drm/drm_dp_mst_helper.h
@@ -911,4 +911,26 @@ __drm_dp_mst_state_iter_get(struct drm_atomic_state *state,
for ((__i) = 0; (__i) < (__state)->num_private_objs; (__i)++) \
for_each_if(__drm_dp_mst_state_iter_get((__state), &(mgr), NULL, &(new_state), (__i)))
+/**
+ * drm_dp_has_mst() - check whether or not a sink supports MST
+ * @aux: The DP AUX channel to use
+ * @dpcd: A cached copy of the DPCD capabilities for this sink
+ *
+ * Returns: %True if the sink supports MST, %false otherwise
+ */
+static inline bool
+drm_dp_has_mst(struct drm_dp_aux *aux,
+ const u8 dpcd[DP_RECEIVER_CAP_SIZE])
+{
+ u8 mstm_cap;
+
+ if (dpcd[DP_DPCD_REV] < DP_DPCD_REV_12)
+ return false;
+
+ if (drm_dp_dpcd_readb(aux, DP_MSTM_CAP, &mstm_cap) != 1)
+ return false;
+
+ return !!(mstm_cap & DP_MST_CAP);
+}
+
#endif
--
2.26.2
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next prev parent reply other threads:[~2020-08-25 19:51 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-08-25 19:50 [Intel-gfx] [RFC v4 00/20] drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 01/20] drm/nouveau/kms: Fix some indenting in nouveau_dp_detect() Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 02/20] drm/nouveau/kms/nv50-: Remove open-coded drm_dp_read_desc() Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 03/20] drm/nouveau/kms/nv50-: Just use drm_dp_dpcd_read() in nouveau_dp.c Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 04/20] drm/nouveau/kms/nv50-: Use macros for DP registers " Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 05/20] drm/nouveau/kms: Don't clear DP_MST_CTRL DPCD in nv50_mstm_new() Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 06/20] drm/nouveau/kms: Search for encoders' connectors properly Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 07/20] drm/nouveau/kms/nv50-: Use drm_dp_dpcd_(readb|writeb)() in nv50_sor_disable() Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 08/20] drm/nouveau/kms/nv50-: Refactor and cleanup DP HPD handling Lyude Paul
2020-08-25 19:50 ` Lyude Paul [this message]
2020-08-26 6:51 ` [Intel-gfx] [RFC v4 09/20] drm/i915/dp: Extract drm_dp_has_mst() Jani Nikula
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 10/20] drm/nouveau/kms: Use new drm_dp_has_mst() helper for checking MST caps Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 11/20] drm/nouveau/kms: Move drm_dp_cec_unset_edid() into nouveau_connector_detect() Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 12/20] drm/nouveau/kms: Only use hpd_work for reprobing in HPD paths Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 13/20] drm/i915/dp: Extract drm_dp_downstream_read_info() Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 14/20] drm/nouveau/kms/nv50-: Use downstream DP clock limits for mode validation Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 15/20] drm/i915/dp: Extract drm_dp_has_sink_count() Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 16/20] drm/i915/dp: Extract drm_dp_get_sink_count() Lyude Paul
2020-08-26 7:05 ` Jani Nikula
2020-08-26 17:10 ` Lyude Paul
2020-08-26 17:12 ` Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 17/20] drm/nouveau/kms/nv50-: Add support for DP_SINK_COUNT Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 18/20] drm/nouveau/kms: Don't change EDID when it hasn't actually changed Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 19/20] drm/i915/dp: Extract drm_dp_read_dpcd_caps() Lyude Paul
2020-08-25 19:50 ` [Intel-gfx] [RFC v4 20/20] drm/nouveau/kms: Start using drm_dp_read_dpcd_caps() Lyude Paul
2020-08-25 20:00 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/dp, i915, nouveau: Cleanup nouveau HPD and add DP features from i915 (rev6) Patchwork
2020-08-25 20:02 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-08-25 20:19 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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