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From: Manasi Navare <manasi.d.navare@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v9 01/11] HAX to make DSC work on the icelake test system
Date: Thu, 24 Sep 2020 11:46:14 -0700	[thread overview]
Message-ID: <20200924184624.20522-1-manasi.d.navare@intel.com> (raw)

From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>

DSC is available on the display emulator, but not set in DPCD.
Override the entries to allow bigjoiner testing.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
---
 drivers/gpu/drm/drm_dp_helper.c | 4 ++--
 include/drm/drm_dp_helper.h     | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c
index 478dd51f738d..7f355c1c49c0 100644
--- a/drivers/gpu/drm/drm_dp_helper.c
+++ b/drivers/gpu/drm/drm_dp_helper.c
@@ -1987,7 +1987,7 @@ u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],
 		if (slice_cap1 & DP_DSC_4_PER_DP_DSC_SINK)
 			return 4;
 		if (slice_cap1 & DP_DSC_2_PER_DP_DSC_SINK)
-			return 2;
+			return 4;
 		if (slice_cap1 & DP_DSC_1_PER_DP_DSC_SINK)
 			return 1;
 	} else {
@@ -2011,7 +2011,7 @@ u8 drm_dp_dsc_sink_max_slice_count(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE],
 		if (slice_cap1 & DP_DSC_4_PER_DP_DSC_SINK)
 			return 4;
 		if (slice_cap1 & DP_DSC_2_PER_DP_DSC_SINK)
-			return 2;
+			return 4;
 		if (slice_cap1 & DP_DSC_1_PER_DP_DSC_SINK)
 			return 1;
 	}
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index c9f2851904d0..42b91764bbad 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -1449,6 +1449,7 @@ int drm_dp_dsc_sink_supported_input_bpcs(const u8 dsc_dpc[DP_DSC_RECEIVER_CAP_SI
 static inline bool
 drm_dp_sink_supports_dsc(const u8 dsc_dpcd[DP_DSC_RECEIVER_CAP_SIZE])
 {
+	return dsc_dpcd[DP_DSC_REV - DP_DSC_SUPPORT];
 	return dsc_dpcd[DP_DSC_SUPPORT - DP_DSC_SUPPORT] &
 		DP_DSC_DECOMPRESSION_IS_SUPPORTED;
 }
-- 
2.19.1

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             reply	other threads:[~2020-09-24 18:45 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-09-24 18:46 Manasi Navare [this message]
2020-09-24 18:46 ` [Intel-gfx] [PATCH v9 02/11] drm/i915/display: Rename pipe_timings to transcoder_timings Manasi Navare
2020-09-24 18:46 ` [Intel-gfx] [PATCH v9 03/11] drm/i915: Add hw.pipe_mode to allow bigjoiner pipe/transcoder split Manasi Navare
2020-09-24 18:46 ` [Intel-gfx] [PATCH v9 04/11] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3 Manasi Navare
2020-09-24 18:46 ` [Intel-gfx] [PATCH v9 05/11] drm/i915: Try to make bigjoiner work in atomic check Manasi Navare
2020-09-24 18:46 ` [Intel-gfx] [PATCH v9 06/11] drm/i915: Enable big joiner support in enable and disable sequences Manasi Navare
2020-09-24 18:46 ` [Intel-gfx] [PATCH v9 07/11] drm/i915: Make hardware readout work on i915 Manasi Navare
2020-09-24 18:46 ` [Intel-gfx] [PATCH v9 08/11] drm/i915: Link planes in a bigjoiner configuration, v3 Manasi Navare
2020-09-24 18:46 ` [Intel-gfx] [PATCH v9 09/11] drm/i915: Add bigjoiner aware plane clipping checks Manasi Navare
2020-09-24 18:46 ` [Intel-gfx] [PATCH v9 10/11] drm/i915: Add intel_update_bigjoiner handling Manasi Navare
2020-09-24 18:46 ` [Intel-gfx] [PATCH v9 11/11] drm/i915: Add debugfs dumping for bigjoiner, v3 Manasi Navare
2020-09-24 19:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v9,01/11] HAX to make DSC work on the icelake test system Patchwork
2020-09-24 19:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-09-24 20:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-09-24 23:05 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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