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From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: seanpaul@chromium.org
Subject: [Intel-gfx] [PATCH 13/13] drm/i915/hdcp: Enable HDCP 2.2 MST support
Date: Wed, 14 Oct 2020 10:22:52 +0530	[thread overview]
Message-ID: <20201014045252.13608-14-anshuman.gupta@intel.com> (raw)
In-Reply-To: <20201014045252.13608-1-anshuman.gupta@intel.com>

Enable HDCP 2.2 over DP MST.

Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++++++++++++++++++++++-
 1 file changed, 44 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index 5e9c5f330c70..8dcc78cc3dcc 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -1684,6 +1684,32 @@ static int hdcp2_authenticate_sink(struct intel_connector *connector)
 	return ret;
 }
 
+static int hdcp2_enable_stream_encryption(struct intel_connector *connector)
+{
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	struct intel_hdcp *hdcp = &connector->hdcp;
+	enum transcoder cpu_transcoder = hdcp->cpu_transcoder;
+	enum port port = dig_port->base.port;
+	int ret = 0;
+
+	if (!(intel_de_read(dev_priv, HDCP2_STATUS(dev_priv, cpu_transcoder, port)) &
+			    LINK_ENCRYPTION_STATUS)) {
+		drm_err(&dev_priv->drm, "HDCP 2.2 Link is not encrypted\n");
+		return -EPERM;
+	}
+
+	if (hdcp->shim->stream_2_2_encryption) {
+		ret = hdcp->shim->stream_2_2_encryption(dig_port, true);
+		if (ret) {
+			drm_err(&dev_priv->drm, "Failed to enable HDCP 2.2 stream enc\n");
+			return ret;
+		}
+	}
+
+	return ret;
+}
+
 static int hdcp2_enable_encryption(struct intel_connector *connector)
 {
 	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
@@ -1822,7 +1848,7 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
 			drm_dbg_kms(&i915->drm, "Port deauth failed.\n");
 	}
 
-	if (!ret) {
+	if (!ret && !dig_port->port_auth) {
 		/*
 		 * Ensuring the required 200mSec min time interval between
 		 * Session Key Exchange and encryption.
@@ -1837,6 +1863,8 @@ static int hdcp2_authenticate_and_encrypt(struct intel_connector *connector)
 		}
 	}
 
+	ret = hdcp2_enable_stream_encryption(connector);
+
 	return ret;
 }
 
@@ -1878,11 +1906,23 @@ static int _intel_hdcp2_disable(struct intel_connector *connector)
 	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	struct hdcp_port_data *data = &dig_port->port_data;
+	struct intel_hdcp *hdcp = &connector->hdcp;
 	int ret;
 
 	drm_dbg_kms(&i915->drm, "[%s:%d] HDCP2.2 is being Disabled\n",
 		    connector->base.name, connector->base.base.id);
 
+	if (hdcp->shim->stream_2_2_encryption) {
+		ret = hdcp->shim->stream_2_2_encryption(dig_port, false);
+		if (ret) {
+			drm_err(&i915->drm, "Failed to disable HDCP 2.2 stream enc\n");
+			return ret;
+		}
+	}
+
+	if (dig_port->num_hdcp_streams > 0)
+		return ret;
+
 	ret = hdcp2_disable_encryption(connector);
 
 	if (hdcp2_deauthenticate_port(connector) < 0)
@@ -1906,6 +1946,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
 	int ret = 0;
 
 	mutex_lock(&hdcp->mutex);
+	mutex_lock(&dig_port->hdcp_mutex);
 	cpu_transcoder = hdcp->cpu_transcoder;
 
 	/* hdcp2_check_link is expected only when HDCP2.2 is Enabled */
@@ -1983,6 +2024,7 @@ static int intel_hdcp2_check_link(struct intel_connector *connector)
 	}
 
 out:
+	mutex_unlock(&dig_port->hdcp_mutex);
 	mutex_unlock(&hdcp->mutex);
 	return ret;
 }
@@ -2164,7 +2206,7 @@ int intel_hdcp_init(struct intel_connector *connector,
 	if (!shim)
 		return -EINVAL;
 
-	if (is_hdcp2_supported(dev_priv) && !connector->mst_port)
+	if (is_hdcp2_supported(dev_priv))
 		intel_hdcp2_init(connector, dig_port, shim);
 
 	ret =
-- 
2.26.2

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  parent reply	other threads:[~2020-10-14  5:03 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-14  4:52 [Intel-gfx] [PATCH 00/13] HDCP 2.2 DP MST Support Anshuman Gupta
2020-10-14  4:52 ` [Intel-gfx] [PATCH 01/13] drm/i915/hdcp: Update CP property in update_pipe Anshuman Gupta
2020-10-14  4:52 ` [Intel-gfx] [PATCH 02/13] drm/i915/hotplug: Handle CP_IRQ for DP-MST Anshuman Gupta
2020-10-14  4:52 ` [Intel-gfx] [PATCH 03/13] drm/i915/hdcp: DP MST transcoder for link and stream Anshuman Gupta
2020-10-14  4:52 ` [Intel-gfx] [PATCH 04/13] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta
2020-10-14  4:52 ` [Intel-gfx] [PATCH 05/13] drm/i915/hdcp: HDCP stream encryption support Anshuman Gupta
2020-10-14  4:52 ` [Intel-gfx] [PATCH 06/13] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta
2020-10-14  4:52 ` [Intel-gfx] [PATCH 07/13] drm/i915/hdcp: Pass dig_port to intel_hdcp_init Anshuman Gupta
2020-10-14  4:52 ` [Intel-gfx] [PATCH 08/13] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Anshuman Gupta
2020-10-14  4:52 ` [Intel-gfx] [PATCH 09/13] drm/i915/hdcp: mst streams support in hdcp port_data Anshuman Gupta
2020-10-19 10:20   ` Anshuman Gupta
2020-10-20  8:31     ` Jani Nikula
2020-10-20  8:30       ` Anshuman Gupta
2020-10-20  9:39         ` Jani Nikula
2020-10-20  9:38           ` Anshuman Gupta
2020-10-20 10:18             ` Jani Nikula
2020-10-14  4:52 ` [Intel-gfx] [PATCH 10/13] drm/i915/hdcp: Pass connector to check_2_2_link Anshuman Gupta
2020-10-14  4:52 ` [Intel-gfx] [PATCH 11/13] drm/i915/hdcp: Add HDCP 2.2 stream register Anshuman Gupta
2020-10-14  4:52 ` [Intel-gfx] [PATCH 12/13] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks Anshuman Gupta
2020-10-14  4:52 ` Anshuman Gupta [this message]
2020-10-14  5:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 DP MST Support (rev2) Patchwork
2020-10-14  5:16 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-14  5:45 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-14 16:03 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-10-19 11:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 DP MST Support (rev3) Patchwork
2020-10-19 11:12 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-19 11:41 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork

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