From: Anshuman Gupta <anshuman.gupta@intel.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: Sean Paul <seanpaul@chromium.org>
Subject: [Intel-gfx] [RFC] drm/hdcp: Max MST content streams
Date: Mon, 19 Oct 2020 12:42:59 +0530 [thread overview]
Message-ID: <20201019071259.24566-1-anshuman.gupta@intel.com> (raw)
Let's define Maximum MST content streams up to four
generically which can be supported by modern display
controllers.
Cc: Sean Paul <seanpaul@chromium.org>
Cc: Ramalingam C <ramalingam.c@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
include/drm/drm_hdcp.h | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/include/drm/drm_hdcp.h b/include/drm/drm_hdcp.h
index fe58dbb46962..ac22c246542a 100644
--- a/include/drm/drm_hdcp.h
+++ b/include/drm/drm_hdcp.h
@@ -101,11 +101,11 @@
/* Following Macros take a byte at a time for bit(s) masking */
/*
- * TODO: This has to be changed for DP MST, as multiple stream on
- * same port is possible.
- * For HDCP2.2 on HDMI and DP SST this value is always 1.
+ * TODO: HDCP_2_2_MAX_CONTENT_STREAMS_CNT is based upon actual
+ * H/W MST streams capacity.
+ * This required to be moved out to platform specific header.
*/
-#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 1
+#define HDCP_2_2_MAX_CONTENT_STREAMS_CNT 4
#define HDCP_2_2_TXCAP_MASK_LEN 2
#define HDCP_2_2_RXCAPS_LEN 3
#define HDCP_2_2_RX_REPEATER(x) ((x) & BIT(0))
--
2.26.2
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next reply other threads:[~2020-10-19 7:23 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-19 7:12 Anshuman Gupta [this message]
2020-10-19 8:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/hdcp: Max MST content streams Patchwork
2020-10-19 9:45 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-10-20 9:42 ` [Intel-gfx] [RFC] " Jani Nikula
2020-10-20 9:47 ` Maarten Lankhorst
2020-10-20 10:17 ` Jani Nikula
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