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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 4/7] drm/i915: Extract hsw_panel_transcoders()
Date: Tue, 20 Oct 2020 00:43:34 +0300	[thread overview]
Message-ID: <20201019214337.19330-4-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20201019214337.19330-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Extract the "panel transcoder" bitmask into a helper. We'll
have a couple of uses for this later.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 30303088a344..2426a452b3bb 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -11032,6 +11032,16 @@ static void hsw_get_ddi_pll(struct drm_i915_private *dev_priv, enum port port,
 	pipe_config->shared_dpll = intel_get_shared_dpll_by_id(dev_priv, id);
 }
 
+static u8 hsw_panel_transcoders(struct drm_i915_private *i915)
+{
+	u8 panel_transcoder_mask = BIT(TRANSCODER_EDP);
+
+	if (INTEL_GEN(i915) >= 11)
+		panel_transcoder_mask |= BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
+
+	return panel_transcoder_mask;
+}
+
 static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 				     struct intel_crtc_state *pipe_config,
 				     u64 *power_domain_mask,
@@ -11040,16 +11050,12 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
 	struct drm_device *dev = crtc->base.dev;
 	struct drm_i915_private *dev_priv = to_i915(dev);
 	enum intel_display_power_domain power_domain;
-	unsigned long panel_transcoder_mask = BIT(TRANSCODER_EDP);
+	u8 panel_transcoder_mask = hsw_panel_transcoders(dev_priv);
 	unsigned long enabled_panel_transcoders = 0;
 	enum transcoder panel_transcoder;
 	intel_wakeref_t wf;
 	u32 tmp;
 
-	if (INTEL_GEN(dev_priv) >= 11)
-		panel_transcoder_mask |=
-			BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1);
-
 	/*
 	 * The pipe->transcoder mapping is fixed with the exception of the eDP
 	 * and DSI transcoders handled below.
-- 
2.26.2

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  parent reply	other threads:[~2020-10-19 21:43 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-10-19 21:43 [Intel-gfx] [PATCH 1/7] drm/i915: Drop one more usless master_transcoder assignment Ville Syrjala
2020-10-19 21:43 ` [Intel-gfx] [PATCH 2/7] drm/i915: Introduce with_intel_display_power_if_enabled() Ville Syrjala
2020-10-19 21:43 ` [Intel-gfx] [PATCH 3/7] drm/i915: Adjust intel_dsc_power_domain() calling convention Ville Syrjala
2020-10-19 21:43 ` Ville Syrjala [this message]
2020-10-19 21:43 ` [Intel-gfx] [PATCH 5/7] drm/i915: Pimp HSW+ transcoder state readout Ville Syrjala
2020-10-19 21:43 ` [Intel-gfx] [PATCH 6/7] drm/i915: cpu_transcoder readout for bigjoiner Ville Syrjala
2020-10-19 21:43 ` [Intel-gfx] [PATCH 7/7] drm/i915: FIXMEs for bigjoiner readout Ville Syrjala
2020-10-19 21:56 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/7] drm/i915: Drop one more usless master_transcoder assignment Patchwork
2020-10-19 21:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-19 22:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-19 22:31 ` [Intel-gfx] [PATCH 1/7] " Navare, Manasi
2020-10-20  3:13 ` [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/7] " Patchwork

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