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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 4/6] drm/i915: s/intel_mode_from_pipe_config/intel_mode_from_crtc_timings/
Date: Thu, 12 Nov 2020 21:17:16 +0200	[thread overview]
Message-ID: <20201112191718.16683-5-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20201112191718.16683-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Generalize intel_mode_from_pipe_config() to work on any two
arbitrary modes. Also relocate the code for the future, and
make it static since it's not needed elsewhere.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 48 ++++++++++----------
 drivers/gpu/drm/i915/display/intel_display.h |  2 -
 2 files changed, 24 insertions(+), 26 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 889642bef192..ebf621ff7ef6 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -8128,6 +8128,27 @@ static u32 ilk_pipe_pixel_rate(const struct intel_crtc_state *crtc_state)
 		       pfit_w * pfit_h);
 }
 
+static void intel_mode_from_crtc_timings(struct drm_display_mode *mode,
+					 const struct drm_display_mode *timings)
+{
+	mode->hdisplay = timings->crtc_hdisplay;
+	mode->htotal = timings->crtc_htotal;
+	mode->hsync_start = timings->crtc_hsync_start;
+	mode->hsync_end = timings->crtc_hsync_end;
+
+	mode->vdisplay = timings->crtc_vdisplay;
+	mode->vtotal = timings->crtc_vtotal;
+	mode->vsync_start = timings->crtc_vsync_start;
+	mode->vsync_end = timings->crtc_vsync_end;
+
+	mode->flags = timings->flags;
+	mode->type = DRM_MODE_TYPE_DRIVER;
+
+	mode->clock = timings->crtc_clock;
+
+	drm_mode_set_name(mode);
+}
+
 static void intel_crtc_compute_pixel_rate(struct intel_crtc_state *crtc_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
@@ -9030,27 +9051,6 @@ static void intel_get_pipe_src_size(struct intel_crtc *crtc,
 	pipe_config->hw.mode.hdisplay = pipe_config->pipe_src_w;
 }
 
-void intel_mode_from_pipe_config(struct drm_display_mode *mode,
-				 struct intel_crtc_state *pipe_config)
-{
-	mode->hdisplay = pipe_config->hw.adjusted_mode.crtc_hdisplay;
-	mode->htotal = pipe_config->hw.adjusted_mode.crtc_htotal;
-	mode->hsync_start = pipe_config->hw.adjusted_mode.crtc_hsync_start;
-	mode->hsync_end = pipe_config->hw.adjusted_mode.crtc_hsync_end;
-
-	mode->vdisplay = pipe_config->hw.adjusted_mode.crtc_vdisplay;
-	mode->vtotal = pipe_config->hw.adjusted_mode.crtc_vtotal;
-	mode->vsync_start = pipe_config->hw.adjusted_mode.crtc_vsync_start;
-	mode->vsync_end = pipe_config->hw.adjusted_mode.crtc_vsync_end;
-
-	mode->flags = pipe_config->hw.adjusted_mode.flags;
-	mode->type = DRM_MODE_TYPE_DRIVER;
-
-	mode->clock = pipe_config->hw.adjusted_mode.crtc_clock;
-
-	drm_mode_set_name(mode);
-}
-
 static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state)
 {
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -12424,7 +12424,7 @@ intel_encoder_current_mode(struct intel_encoder *encoder)
 
 	intel_encoder_get_config(encoder, crtc_state);
 
-	intel_mode_from_pipe_config(mode, crtc_state);
+	intel_mode_from_crtc_timings(mode, &crtc_state->hw.adjusted_mode);
 
 	kfree(crtc_state);
 
@@ -18841,8 +18841,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev)
 		if (crtc_state->hw.active) {
 			struct drm_display_mode *mode = &crtc_state->hw.mode;
 
-			intel_mode_from_pipe_config(&crtc_state->hw.adjusted_mode,
-						    crtc_state);
+			intel_mode_from_crtc_timings(&crtc_state->hw.adjusted_mode,
+						     &crtc_state->hw.adjusted_mode);
 
 			*mode = crtc_state->hw.adjusted_mode;
 			mode->hdisplay = crtc_state->pipe_src_w;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index a988f9518ece..6be14e8571aa 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -609,8 +609,6 @@ enum intel_display_power_domain
 intel_aux_power_domain(struct intel_digital_port *dig_port);
 enum intel_display_power_domain
 intel_legacy_aux_to_power_domain(enum aux_ch aux_ch);
-void intel_mode_from_pipe_config(struct drm_display_mode *mode,
-				 struct intel_crtc_state *pipe_config);
 void intel_crtc_arm_fifo_underrun(struct intel_crtc *crtc,
 				  struct intel_crtc_state *crtc_state);
 
-- 
2.26.2

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  parent reply	other threads:[~2020-11-12 19:17 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-12 19:17 [Intel-gfx] [PATCH 0/6] drm/i915: Introduce crtc_state.hw.pipe_mode Ville Syrjala
2020-11-12 19:17 ` [Intel-gfx] [PATCH 1/6] drm/i915: Move encoder->get_config to a new function Ville Syrjala
2020-11-12 19:45   ` Navare, Manasi
2020-11-13  8:56     ` Manna, Animesh
2020-11-12 19:17 ` [Intel-gfx] [PATCH 2/6] drm/i915: Add a wrapper function around get_pipe_config Ville Syrjala
2020-11-12 19:46   ` Navare, Manasi
2020-11-13  8:58     ` Manna, Animesh
2020-11-12 19:17 ` [Intel-gfx] [PATCH 3/6] drm/i915: Move hw.active assignment into intel_crtc_get_pipe_config() Ville Syrjala
2020-11-12 19:48   ` Navare, Manasi
2020-11-13 14:27     ` Ville Syrjälä
2020-11-12 19:17 ` Ville Syrjala [this message]
2020-11-12 19:49   ` [Intel-gfx] [PATCH 4/6] drm/i915: s/intel_mode_from_pipe_config/intel_mode_from_crtc_timings/ Navare, Manasi
2020-11-12 19:17 ` [Intel-gfx] [PATCH 5/6] drm/i915: Introduce intel_crtc_readout_derived_state() Ville Syrjala
2020-11-12 19:49   ` Navare, Manasi
2020-11-12 19:17 ` [Intel-gfx] [PATCH 6/6] drm/i915: Add hw.pipe_mode to allow bigjoiner pipe/transcoder split Ville Syrjala
2020-11-12 23:45 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Introduce crtc_state.hw.pipe_mode Patchwork
2020-11-13  0:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-13  2:46 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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