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From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
Subject: [Intel-gfx] [PATCH v5 10/63] drm/i915: make lockdep slightly happier about execbuf.
Date: Wed, 25 Nov 2020 11:39:18 +0100	[thread overview]
Message-ID: <20201125104011.606641-11-maarten.lankhorst@linux.intel.com> (raw)
In-Reply-To: <20201125104011.606641-1-maarten.lankhorst@linux.intel.com>

As soon as we install fences, we should stop allocating memory
in order to prevent any potential deadlocks.

This is required later on, when we start adding support for
dma-fence annotations.

Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
 .../gpu/drm/i915/gem/i915_gem_execbuffer.c    | 24 ++++++++++++++-----
 drivers/gpu/drm/i915/i915_active.c            | 20 ++++++++--------
 drivers/gpu/drm/i915/i915_vma.c               |  8 ++++---
 drivers/gpu/drm/i915/i915_vma.h               |  3 +++
 4 files changed, 36 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
index 62b664dd453f..b396e47da0ea 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
@@ -49,11 +49,12 @@ enum {
 #define DBG_FORCE_RELOC 0 /* choose one of the above! */
 };
 
-#define __EXEC_OBJECT_HAS_PIN		BIT(31)
-#define __EXEC_OBJECT_HAS_FENCE		BIT(30)
-#define __EXEC_OBJECT_NEEDS_MAP		BIT(29)
-#define __EXEC_OBJECT_NEEDS_BIAS	BIT(28)
-#define __EXEC_OBJECT_INTERNAL_FLAGS	(~0u << 28) /* all of the above */
+/* __EXEC_OBJECT_NO_RESERVE is BIT(31), defined in i915_vma.h */
+#define __EXEC_OBJECT_HAS_PIN		BIT(30)
+#define __EXEC_OBJECT_HAS_FENCE		BIT(29)
+#define __EXEC_OBJECT_NEEDS_MAP		BIT(28)
+#define __EXEC_OBJECT_NEEDS_BIAS	BIT(27)
+#define __EXEC_OBJECT_INTERNAL_FLAGS	(~0u << 27) /* all of the above + */
 #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE)
 
 #define __EXEC_HAS_RELOC	BIT(31)
@@ -929,6 +930,12 @@ static int eb_validate_vmas(struct i915_execbuffer *eb)
 			}
 		}
 
+		if (!(ev->flags & EXEC_OBJECT_WRITE)) {
+			err = dma_resv_reserve_shared(vma->resv, 1);
+			if (err)
+				return err;
+		}
+
 		GEM_BUG_ON(drm_mm_node_allocated(&vma->node) &&
 			   eb_vma_misplaced(&eb->exec[i], vma, ev->flags));
 	}
@@ -2194,7 +2201,8 @@ static int eb_move_to_gpu(struct i915_execbuffer *eb)
 		}
 
 		if (err == 0)
-			err = i915_vma_move_to_active(vma, eb->request, flags);
+			err = i915_vma_move_to_active(vma, eb->request,
+						      flags | __EXEC_OBJECT_NO_RESERVE);
 	}
 
 	if (unlikely(err))
@@ -2446,6 +2454,10 @@ static int eb_parse_pipeline(struct i915_execbuffer *eb,
 	if (err)
 		goto err_commit;
 
+	err = dma_resv_reserve_shared(shadow->resv, 1);
+	if (err)
+		goto err_commit;
+
 	/* Wait for all writes (and relocs) into the batch to complete */
 	err = i915_sw_fence_await_reservation(&pw->base.chain,
 					      pw->batch->resv, NULL, false,
diff --git a/drivers/gpu/drm/i915/i915_active.c b/drivers/gpu/drm/i915/i915_active.c
index 10a865f3dc09..6ba4f878ab0e 100644
--- a/drivers/gpu/drm/i915/i915_active.c
+++ b/drivers/gpu/drm/i915/i915_active.c
@@ -296,18 +296,13 @@ static struct active_node *__active_lookup(struct i915_active *ref, u64 idx)
 static struct i915_active_fence *
 active_instance(struct i915_active *ref, u64 idx)
 {
-	struct active_node *node, *prealloc;
+	struct active_node *node;
 	struct rb_node **p, *parent;
 
 	node = __active_lookup(ref, idx);
 	if (likely(node))
 		return &node->base;
 
-	/* Preallocate a replacement, just in case */
-	prealloc = kmem_cache_alloc(global.slab_cache, GFP_KERNEL);
-	if (!prealloc)
-		return NULL;
-
 	spin_lock_irq(&ref->tree_lock);
 	GEM_BUG_ON(i915_active_is_idle(ref));
 
@@ -317,10 +312,8 @@ active_instance(struct i915_active *ref, u64 idx)
 		parent = *p;
 
 		node = rb_entry(parent, struct active_node, node);
-		if (node->timeline == idx) {
-			kmem_cache_free(global.slab_cache, prealloc);
+		if (node->timeline == idx)
 			goto out;
-		}
 
 		if (node->timeline < idx)
 			p = &parent->rb_right;
@@ -328,7 +321,14 @@ active_instance(struct i915_active *ref, u64 idx)
 			p = &parent->rb_left;
 	}
 
-	node = prealloc;
+	/*
+	 * XXX: We should preallocate this before i915_active_ref() is ever
+	 *  called, but we cannot call into fs_reclaim() anyway, so use GFP_ATOMIC.
+	 */
+	node = kmem_cache_alloc(global.slab_cache, GFP_ATOMIC);
+	if (!node)
+		goto out;
+
 	__i915_active_fence_init(&node->base, NULL, node_retire);
 	node->ref = ref;
 	node->timeline = idx;
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 7310893086f7..1ffda2aaa7a0 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -1247,9 +1247,11 @@ int i915_vma_move_to_active(struct i915_vma *vma,
 		obj->write_domain = I915_GEM_DOMAIN_RENDER;
 		obj->read_domains = 0;
 	} else {
-		err = dma_resv_reserve_shared(vma->resv, 1);
-		if (unlikely(err))
-			return err;
+		if (!(flags & __EXEC_OBJECT_NO_RESERVE)) {
+			err = dma_resv_reserve_shared(vma->resv, 1);
+			if (unlikely(err))
+				return err;
+		}
 
 		dma_resv_add_shared_fence(vma->resv, &rq->fence);
 		obj->write_domain = 0;
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index 838bbbeb11cc..3c951d5428cf 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -52,6 +52,9 @@ static inline bool i915_vma_is_active(const struct i915_vma *vma)
 	return !i915_active_is_idle(&vma->active);
 }
 
+/* do not reserve memory to prevent deadlocks */
+#define __EXEC_OBJECT_NO_RESERVE BIT(31)
+
 int __must_check __i915_vma_move_to_active(struct i915_vma *vma,
 					   struct i915_request *rq);
 int __must_check i915_vma_move_to_active(struct i915_vma *vma,
-- 
2.29.2.222.g5d2a92d10f8

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  parent reply	other threads:[~2020-11-25 10:40 UTC|newest]

Thread overview: 71+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-25 10:39 [Intel-gfx] [PATCH v5 00/63] drm/i915: Remove obj->mm.lock! Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 01/63] drm/i915: Do not share hwsp across contexts any more, v6 Maarten Lankhorst
2020-11-25 10:44   ` Chris Wilson
2020-11-27 10:06     ` Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 02/63] drm/i915: Pin timeline map after first timeline pin, v3 Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 03/63] drm/i915: Move cmd parser pinning to execbuffer Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 04/63] drm/i915: Add missing -EDEADLK handling to execbuf pinning, v2 Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 05/63] drm/i915: Ensure we hold the object mutex in pin correctly Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 06/63] drm/i915: Add gem object locking to madvise Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 07/63] drm/i915: Move HAS_STRUCT_PAGE to obj->flags Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 08/63] drm/i915: Rework struct phys attachment handling Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 09/63] drm/i915: Convert i915_gem_object_attach_phys() to ww locking, v2 Maarten Lankhorst
2020-11-25 10:39 ` Maarten Lankhorst [this message]
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 11/63] drm/i915: Disable userptr pread/pwrite support Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 12/63] drm/i915: No longer allow exporting userptr through dma-buf Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 13/63] drm/i915: Reject more ioctls for userptr Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 14/63] drm/i915: Reject UNSYNCHRONIZED for userptr, v2 Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 15/63] drm/i915: Make compilation of userptr code depend on MMU_NOTIFIER Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 16/63] drm/i915: Fix userptr so we do not have to worry about obj->mm.lock, v5 Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 17/63] drm/i915: Flatten obj->mm.lock Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 18/63] drm/i915: Populate logical context during first pin Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 19/63] drm/i915: Make ring submission compatible with obj->mm.lock removal, v2 Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 20/63] drm/i915: Handle ww locking in init_status_page Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 21/63] drm/i915: Rework clflush to work correctly without obj->mm.lock Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 22/63] drm/i915: Pass ww ctx to intel_pin_to_display_plane Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 23/63] drm/i915: Add object locking to vm_fault_cpu Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 24/63] drm/i915: Move pinning to inside engine_wa_list_verify() Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 25/63] drm/i915: Take reservation lock around i915_vma_pin Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 26/63] drm/i915: Make intel_init_workaround_bb more compatible with ww locking Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 27/63] drm/i915: Make __engine_unpark() " Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 28/63] drm/i915: Take obj lock around set_domain ioctl Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 29/63] drm/i915: Defer pin calls in buffer pool until first use by caller Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 30/63] drm/i915: Fix pread/pwrite to work with new locking rules Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 31/63] drm/i915: Fix workarounds selftest, part 1 Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 32/63] drm/i915: Prepare for obj->mm.lock removal Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 33/63] drm/i915: Add igt_spinner_pin() to allow for ww locking around spinner Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 34/63] drm/i915: Add ww locking around vm_access() Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 35/63] drm/i915: Increase ww locking for perf Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 36/63] drm/i915: Lock ww in ucode objects correctly Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 37/63] drm/i915: Add ww locking to dma-buf ops Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 38/63] drm/i915: Add missing ww lock in intel_dsb_prepare Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 39/63] drm/i915: Fix ww locking in shmem_create_from_object Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 40/63] drm/i915: Use a single page table lock for each gtt Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 41/63] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 42/63] drm/i915/selftests: Prepare client blit " Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 43/63] drm/i915/selftests: Prepare coherency tests " Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 44/63] drm/i915/selftests: Prepare context " Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 45/63] drm/i915/selftests: Prepare dma-buf " Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 46/63] drm/i915/selftests: Prepare execbuf " Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 47/63] drm/i915/selftests: Prepare mman testcases " Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 48/63] drm/i915/selftests: Prepare object tests " Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 49/63] drm/i915/selftests: Prepare object blit " Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 50/63] drm/i915/selftests: Prepare igt_gem_utils " Maarten Lankhorst
2020-11-25 10:39 ` [Intel-gfx] [PATCH v5 51/63] drm/i915/selftests: Prepare context selftest " Maarten Lankhorst
2020-11-25 10:40 ` [Intel-gfx] [PATCH v5 52/63] drm/i915/selftests: Prepare hangcheck " Maarten Lankhorst
2020-11-25 10:40 ` [Intel-gfx] [PATCH v5 53/63] drm/i915/selftests: Prepare execlists " Maarten Lankhorst
2020-11-25 10:40 ` [Intel-gfx] [PATCH v5 54/63] drm/i915/selftests: Prepare mocs tests " Maarten Lankhorst
2020-11-25 10:40 ` [Intel-gfx] [PATCH v5 55/63] drm/i915/selftests: Prepare ring submission " Maarten Lankhorst
2020-11-25 10:40 ` [Intel-gfx] [PATCH v5 56/63] drm/i915/selftests: Prepare timeline tests " Maarten Lankhorst
2020-11-25 10:40 ` [Intel-gfx] [PATCH v5 57/63] drm/i915/selftests: Prepare i915_request " Maarten Lankhorst
2020-11-25 10:40 ` [Intel-gfx] [PATCH v5 58/63] drm/i915/selftests: Prepare memory region " Maarten Lankhorst
2020-11-25 10:40 ` [Intel-gfx] [PATCH v5 59/63] drm/i915/selftests: Prepare cs engine " Maarten Lankhorst
2020-11-25 10:40 ` [Intel-gfx] [PATCH v5 60/63] drm/i915/selftests: Prepare gtt " Maarten Lankhorst
2020-11-25 10:40 ` [Intel-gfx] [PATCH v5 61/63] drm/i915: Finally remove obj->mm.lock Maarten Lankhorst
2020-11-25 10:40 ` [Intel-gfx] [PATCH v5 62/63] drm/i915: Keep userpointer bindings if seqcount is unchanged, v2 Maarten Lankhorst
2020-11-25 10:40 ` [Intel-gfx] [PATCH v5 63/63] drm/i915: Move gt_revoke() slightly Maarten Lankhorst
2020-11-25 12:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Remove obj->mm.lock! (rev11) Patchwork
2020-11-25 12:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-25 12:34 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-11-25 13:00 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-25 14:49 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork

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