Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Anshuman Gupta <anshuman.gupta@intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, seanpaul@chromium.org
Subject: [Intel-gfx] [PATCH v6 04/18] drm/i915/hdcp: No HDCP when encoder is't initialized
Date: Thu, 26 Nov 2020 13:07:08 +0530	[thread overview]
Message-ID: <20201126073722.19107-5-anshuman.gupta@intel.com> (raw)
In-Reply-To: <20201126073722.19107-1-anshuman.gupta@intel.com>

There can be situation when DP MST connector is created without
mst modeset being done, in those cases connector->encoder will be
NULL. MST connector->encoder initializes after modeset.
Don't enable HDCP in such cases to prevent any crash.

Cc: Ramalingam C <ramalingam.c@intel.com>
Cc: Juston Li <juston.li@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index b9d8825e2bb1..7d63e9495956 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2106,6 +2106,12 @@ int intel_hdcp_enable(struct intel_connector *connector,
 	if (!hdcp->shim)
 		return -ENOENT;
 
+	if (!connector->encoder) {
+		drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
+			connector->base.name, connector->base.base.id);
+		return -ENODEV;
+	}
+
 	mutex_lock(&hdcp->mutex);
 	mutex_lock(&dig_port->hdcp_mutex);
 	drm_WARN_ON(&dev_priv->drm,
-- 
2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2020-11-26  7:51 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-26  7:37 [Intel-gfx] [PATCH v6 00/18] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 01/18] drm/i915/hdcp: Update CP property in update_pipe Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 02/18] drm/i915/hdcp: Get conn while content_type changed Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 03/18] drm/i915/hotplug: Handle CP_IRQ for DP-MST Anshuman Gupta
2020-11-26  7:37 ` Anshuman Gupta [this message]
2020-12-04  9:02   ` [Intel-gfx] [PATCH v6 04/18] drm/i915/hdcp: No HDCP when encoder is't initialized Ramalingam C
2020-12-04  8:58     ` Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 05/18] drm/i915/hdcp: DP MST transcoder for link and stream Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 06/18] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 07/18] drm/i915/hdcp: HDCP stream encryption support Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 08/18] drm/i915/hdcp: Enable HDCP 1.4 stream encryption Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 09/18] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 10/18] drm/i915/hdcp: Pass dig_port to intel_hdcp_init Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 11/18] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 12/18] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 13/18] drm/hdcp: Max MST content streams Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 14/18] drm/i915/hdcp: MST streams support in hdcp port_data Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 15/18] drm/i915/hdcp: Pass connector to check_2_2_link Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 16/18] drm/i915/hdcp: Add HDCP 2.2 stream register Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 17/18] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks Anshuman Gupta
2020-11-26  7:37 ` [Intel-gfx] [PATCH v6 18/18] drm/i915/hdcp: Enable HDCP 2.2 MST support Anshuman Gupta
2020-11-26 10:15 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP MST support (rev5) Patchwork
2020-11-26 10:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-11-26 10:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-11-26 12:58 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-11-27  5:36 ` [Intel-gfx] [PATCH v6 00/18] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support Karthik B S

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20201126073722.19107-5-anshuman.gupta@intel.com \
    --to=anshuman.gupta@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jani.nikula@intel.com \
    --cc=seanpaul@chromium.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox