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From: Anshuman Gupta <anshuman.gupta@intel.com>
To: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v5 2/2] drm/i915/display: Support Multiple Transcoders' PSR status on debugfs
Date: Mon, 14 Dec 2020 16:45:37 +0530	[thread overview]
Message-ID: <20201214111537.GG9309@intel.com> (raw)
In-Reply-To: <20201211171421.4048499-2-gwan-gyeong.mun@intel.com>

On 2020-12-11 at 19:14:21 +0200, Gwan-gyeong Mun wrote:
> In order to support the PSR state of each transcoder, it adds
> i915_psr_status to sub-directory of each transcoder.
> 
> v2: Change using of Symbolic permissions 'S_IRUGO' to using of octal
>     permissions '0444'
> v5: Addressed JJani Nikula's review comments
>  - Remove checking of Gen12 for i915_psr_status.
>  - Add check of HAS_PSR()
>  - Remove meaningless check routine.
> 
> Signed-off-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_debugfs.c | 16 ++++++++++++++++
>  1 file changed, 16 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 041053167d7f..d2dd61c4ee0b 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -2224,6 +2224,16 @@ static int i915_hdcp_sink_capability_show(struct seq_file *m, void *data)
>  }
>  DEFINE_SHOW_ATTRIBUTE(i915_hdcp_sink_capability);
>  
> +static int i915_psr_status_show(struct seq_file *m, void *data)
> +{
> +	struct drm_connector *connector = m->private;
> +	struct intel_dp *intel_dp =
> +		intel_attached_dp(to_intel_connector(connector));
> +
> +	return intel_psr_status(m, intel_dp);
> +}
> +DEFINE_SHOW_ATTRIBUTE(i915_psr_status);
> +
>  #define LPSP_CAPABLE(COND) (COND ? seq_puts(m, "LPSP: capable\n") : \
>  				seq_puts(m, "LPSP: incapable\n"))
>  
> @@ -2399,6 +2409,12 @@ int intel_connector_debugfs_add(struct drm_connector *connector)
>  				    connector, &i915_psr_sink_status_fops);
>  	}
>  
> +	if (HAS_PSR(dev_priv) &&
> +	    connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
> +		debugfs_create_file("i915_psr_status", 0444, root,
Could we keep the file name as i915_edp_psr_status, as we have today?
with that addressed.
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> +				    connector, &i915_psr_status_fops);
> +	}
> +
>  	if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort ||
>  	    connector->connector_type == DRM_MODE_CONNECTOR_HDMIA ||
>  	    connector->connector_type == DRM_MODE_CONNECTOR_HDMIB) {
> -- 
> 2.25.0
> 
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  reply	other threads:[~2020-12-14 11:29 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-11 17:14 [Intel-gfx] [PATCH v5 1/2] drm/i915/display: Support PSR Multiple Transcoders Gwan-gyeong Mun
2020-12-11 17:14 ` [Intel-gfx] [PATCH v5 2/2] drm/i915/display: Support Multiple Transcoders' PSR status on debugfs Gwan-gyeong Mun
2020-12-14 11:15   ` Anshuman Gupta [this message]
2020-12-14 11:35     ` Jani Nikula
2020-12-14 17:46       ` Mun, Gwan-gyeong
2020-12-11 17:37 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/2] drm/i915/display: Support PSR Multiple Transcoders Patchwork
2020-12-11 17:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-12-11 17:42 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-12-11 18:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-11 21:33 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-12-14 11:02 ` [Intel-gfx] [PATCH v5 1/2] " Anshuman Gupta
2020-12-14 11:42   ` Mun, Gwan-gyeong
2020-12-14 13:17     ` Anshuman Gupta
2020-12-14 15:59   ` Mun, Gwan-gyeong
2020-12-14 11:33 ` Jani Nikula
2020-12-14 16:54   ` Mun, Gwan-gyeong

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