From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH] drm/i915: clear the end of the shadow batch if needed
Date: Wed, 23 Dec 2020 17:19:41 +0000 [thread overview]
Message-ID: <20201223171941.308038-1-matthew.auld@intel.com> (raw)
The shadow batch is an internal object, which doesn't have any page
clearing, and since the batch_len might be within a page, we should take
care to clear any unused dwords before making it visible in the ppGTT.
Testcase: igt/gen9_exec_parse/shadow-peek
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 8d88402387bd..6506ed30b444 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -1139,6 +1139,7 @@ static u32 *copy_batch(struct drm_i915_gem_object *dst_obj,
struct drm_i915_gem_object *src_obj,
unsigned long offset, unsigned long length)
{
+ unsigned long orig_length = length;
bool needs_clflush;
void *dst, *src;
int ret;
@@ -1199,6 +1200,12 @@ static u32 *copy_batch(struct drm_i915_gem_object *dst_obj,
}
}
+ if (offset_in_page(orig_length)) {
+ memset(dst + orig_length, 0,
+ PAGE_SIZE - offset_in_page(orig_length));
+ i915_gem_object_flush_map(dst_obj);
+ }
+
i915_gem_object_unpin_pages(src_obj);
/* dst_obj is returned with vmap pinned */
--
2.26.2
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next reply other threads:[~2020-12-23 17:19 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-23 17:19 Matthew Auld [this message]
2020-12-23 18:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: clear the end of the shadow batch if needed Patchwork
2020-12-23 20:46 ` [Intel-gfx] [PATCH] " Chris Wilson
2020-12-23 23:33 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork
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