From: Zhenyu Wang <zhenyuw@linux.intel.com>
To: "Zhang, Xiong Y" <xiong.y.zhang@intel.com>
Cc: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"chris@chris-wilson.co.uk" <chris@chris-wilson.co.uk>
Subject: Re: [Intel-gfx] [PATCH v2] drm/i915: Try to guess PCH type even without ISA bridge
Date: Thu, 24 Dec 2020 12:49:50 +0800 [thread overview]
Message-ID: <20201224044950.GE16939@zhen-hp.sh.intel.com> (raw)
In-Reply-To: <DM6PR11MB334085330EFDA917B59BDE2FBBDD0@DM6PR11MB3340.namprd11.prod.outlook.com>
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On 2020.12.24 02:54:18 +0000, Zhang, Xiong Y wrote:
> > On Fri, 18 Dec 2020, Xiong Zhang <xiong.y.zhang@intel.com> wrote:
> > > From: Zhenyu Wang <zhenyuw@linux.intel.com>
> > >
> > > Some vmm like hyperv and crosvm don't supply any ISA bridge to their
> > > guest, when igd passthrough is equipped on these vmm, guest i915
> > > display may couldn't work as guest i915 detects PCH_NONE pch type.
> > >
> > > When i915 runs as guest, this patch guess pch type through gpu type
> > > even without ISA bridge.
> > >
> > > v2: Fix CI warning
> > >
> > > Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
> > > ---
> > > drivers/gpu/drm/i915/i915_drv.h | 7 +++++-
> > > drivers/gpu/drm/i915/intel_pch.c | 38 ++++++++++++++++++++++----------
> > > 2 files changed, 32 insertions(+), 13 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/i915_drv.h
> > > b/drivers/gpu/drm/i915/i915_drv.h index 5a7df5621aa3..df0b8f9268b2
> > > 100644
> > > --- a/drivers/gpu/drm/i915/i915_drv.h
> > > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > > @@ -1758,6 +1758,11 @@ tgl_revids_get(struct drm_i915_private
> > > *dev_priv) #define INTEL_DISPLAY_ENABLED(dev_priv) \
> > > (drm_WARN_ON(&(dev_priv)->drm, !HAS_DISPLAY(dev_priv)),
> > > !(dev_priv)->params.disable_display)
> > >
> > > +static inline bool run_as_guest(void) {
> > > + return !hypervisor_is_type(X86_HYPER_NATIVE);
> > > +}
> > > +
> > > static inline bool intel_vtd_active(void) { #ifdef
> > > CONFIG_INTEL_IOMMU @@ -1766,7 +1771,7 @@ static inline bool
> > > intel_vtd_active(void) #endif
> > >
> > > /* Running as a guest, we assume the host is enforcing VT'd */
> > > - return !hypervisor_is_type(X86_HYPER_NATIVE);
> > > + return run_as_guest();
> > > }
> > >
> > > static inline bool intel_scanout_needs_vtd_wa(struct drm_i915_private
> > > *dev_priv) diff --git a/drivers/gpu/drm/i915/intel_pch.c
> > > b/drivers/gpu/drm/i915/intel_pch.c
> > > index f31c0dabd0cc..a73c60bf349e 100644
> > > --- a/drivers/gpu/drm/i915/intel_pch.c
> > > +++ b/drivers/gpu/drm/i915/intel_pch.c
> > > @@ -184,6 +184,23 @@ intel_virt_detect_pch(const struct
> > drm_i915_private *dev_priv)
> > > return id;
> > > }
> > >
> > > +static void intel_detect_pch_virt(struct drm_i915_private *dev_priv)
> > > +{
> > > + unsigned short id;
> > > + enum intel_pch pch_type;
> > > +
> > > + id = intel_virt_detect_pch(dev_priv);
> >
> > intel_detect_pch_virt() calls intel_virt_detect_pch()... the naming should be
> > clarified to make some difference.
> [Zhang, Xiong Y] Indeed the naming is confusing. How about deleting this new added function, then move intel_pch_type() calling into original intel_virt_detect_pch(), and let intel_virt_detect_pch() return id and pch_type, finally assign id and pch_type in intel_detect_pch().
>
May just put those in intel_virt_detect_pch() for all virt cases.
> >
> > > + pch_type = intel_pch_type(dev_priv, id);
> > > +
> > > + /* Sanity check virtual PCH id */
> > > + if (drm_WARN_ON(&dev_priv->drm,
> > > + id && pch_type == PCH_NONE))
> > > + id = 0;
> > > +
> > > + dev_priv->pch_type = pch_type;
> > > + dev_priv->pch_id = id;
> >
> > Previously the pch type and id assignments were all done in
> > intel_detect_pch(), so moving this to a separate function in *some* but not
> > all cases reduces clarity too.
> >
> > BR,
> > Jani.
> >
> > > +}
> > > +
> > > void intel_detect_pch(struct drm_i915_private *dev_priv) {
> > > struct pci_dev *pch = NULL;
> > > @@ -221,16 +238,7 @@ void intel_detect_pch(struct drm_i915_private
> > *dev_priv)
> > > break;
> > > } else if (intel_is_virt_pch(id, pch->subsystem_vendor,
> > > pch->subsystem_device)) {
> > > - id = intel_virt_detect_pch(dev_priv);
> > > - pch_type = intel_pch_type(dev_priv, id);
> > > -
> > > - /* Sanity check virtual PCH id */
> > > - if (drm_WARN_ON(&dev_priv->drm,
> > > - id && pch_type == PCH_NONE))
> > > - id = 0;
> > > -
> > > - dev_priv->pch_type = pch_type;
> > > - dev_priv->pch_id = id;
> > > + intel_detect_pch_virt(dev_priv);
> > > break;
> > > }
> > > }
> > > @@ -246,8 +254,14 @@ void intel_detect_pch(struct drm_i915_private
> > *dev_priv)
> > > dev_priv->pch_id = 0;
> > > }
> > >
> > > - if (!pch)
> > > - drm_dbg_kms(&dev_priv->drm, "No PCH found.\n");
> > > + if (!pch) {
> > > + if (run_as_guest()) {
> > > + drm_dbg_kms(&dev_priv->drm, "No PCH found in
> > vm, try guess..\n");
> > > + intel_detect_pch_virt(dev_priv);
> > > + } else {
> > > + drm_dbg_kms(&dev_priv->drm, "No PCH found.\n");
> > > + }
> > > + }
> > >
> > > pci_dev_put(pch);
> > > }
> >
> > --
> > Jani Nikula, Intel Open Source Graphics Center
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next prev parent reply other threads:[~2020-12-24 5:05 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-14 7:01 [Intel-gfx] [PATCH] drm/i915: Try to guess PCH type even without ISA bridge Xiong Zhang
2020-12-14 7:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2020-12-14 7:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-12-18 9:05 ` [Intel-gfx] [PATCH v2] " Xiong Zhang
2020-12-22 5:15 ` Zhenyu Wang
2020-12-23 8:39 ` Zhang, Xiong Y
2020-12-23 8:59 ` Jani Nikula
2020-12-24 2:42 ` Zhang, Xiong Y
2020-12-24 2:54 ` Zhang, Xiong Y
2020-12-24 4:49 ` Zhenyu Wang [this message]
2021-01-13 4:53 ` [Intel-gfx] [PATCH v3] " Xiong Zhang
2021-01-14 0:58 ` [Intel-gfx] [PATCH v4] " Xiong Zhang
2021-01-14 5:14 ` Zhenyu Wang
2021-01-15 10:50 ` Jani Nikula
2021-01-15 11:01 ` Joonas Lahtinen
2021-01-18 6:04 ` Zhenyu Wang
2021-01-18 9:56 ` Jani Nikula
2020-12-18 10:16 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Try to guess PCH type even without ISA bridge (rev2) Patchwork
2020-12-18 11:27 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-01-13 5:23 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Try to guess PCH type even without ISA bridge (rev3) Patchwork
2021-01-13 5:52 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-01-14 2:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Try to guess PCH type even without ISA bridge (rev4) Patchwork
2021-01-14 4:59 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-12-14 7:22 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915: Try to guess PCH type even without ISA bridge Patchwork
2020-12-14 7:47 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-14 9:25 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-12-14 10:10 ` [Intel-gfx] [PATCH] " kernel test robot
2020-12-14 10:10 ` [Intel-gfx] [RFC PATCH] drm/i915: intel_detect_pch_virt() can be static kernel test robot
2020-12-14 12:50 ` [Intel-gfx] [PATCH] drm/i915: Try to guess PCH type even without ISA bridge kernel test robot
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