From: Juston Li <juston.li@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: seanpaul@chromium.org
Subject: [Intel-gfx] [PATCH v2 2/4] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg()
Date: Tue, 26 Jan 2021 22:50:32 -0800 [thread overview]
Message-ID: <20210127065034.2501119-2-juston.li@intel.com> (raw)
In-Reply-To: <20210127065034.2501119-1-juston.li@intel.com>
Update cp_irq_count_cached when we handle reading the messages rather
than writing a message to make sure the value is up to date and not
stale from a previously handled CP_IRQ. AKE flow doesn't always respond
to a read with a write msg.
E.g. currently AKE_Send_Pairing_Info will "timeout" because we received
a CP_IRQ for reading AKE_Send_H_Prime but no write occurred between that
and reading AKE_Send_Pairing_Info so cp_irq_count_cached is stale
causing the wait to return right away rather than waiting for a new
CP_IRQ.
Signed-off-by: Juston Li <juston.li@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
index 4dba5bb15af5..d1397af97f69 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_hdcp.c
@@ -442,8 +442,6 @@ static
int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port,
void *buf, size_t size)
{
- struct intel_dp *dp = &dig_port->dp;
- struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
unsigned int offset;
u8 *byte = buf;
ssize_t ret, bytes_to_write, len;
@@ -459,8 +457,6 @@ int intel_dp_hdcp2_write_msg(struct intel_digital_port *dig_port,
bytes_to_write = size - 1;
byte++;
- hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
-
while (bytes_to_write) {
len = bytes_to_write > DP_AUX_MAX_PAYLOAD_BYTES ?
DP_AUX_MAX_PAYLOAD_BYTES : bytes_to_write;
@@ -509,6 +505,8 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
u8 msg_id, void *buf, size_t size)
{
struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev);
+ struct intel_dp *dp = &dig_port->dp;
+ struct intel_hdcp *hdcp = &dp->attached_connector->hdcp;
unsigned int offset;
u8 *byte = buf;
ssize_t ret, bytes_to_recv, len;
@@ -523,6 +521,8 @@ int intel_dp_hdcp2_read_msg(struct intel_digital_port *dig_port,
if (ret < 0)
return ret;
+ hdcp->cp_irq_count_cached = atomic_read(&hdcp->cp_irq_count);
+
if (msg_id == HDCP_2_2_REP_SEND_RECVID_LIST) {
ret = get_receiver_id_list_size(dig_port);
if (ret < 0)
--
2.29.2
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next prev parent reply other threads:[~2021-01-27 6:51 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-27 6:50 [Intel-gfx] [PATCH v2 1/4] drm/i915/hdcp: Disable the QSES check for HDCP 1.4 over MST Juston Li
2021-01-27 6:50 ` Juston Li [this message]
2021-01-27 7:17 ` [Intel-gfx] [PATCH v2 2/4] drm/i915/hdcp: update cp_irq_count_cached in intel_dp_hdcp2_read_msg() Gupta, Anshuman
2021-01-27 6:50 ` [Intel-gfx] [PATCH v2 3/4] drm/i915/hdcp: read RxInfo once when reading Send_Pairing_Info Juston Li
2021-01-27 7:24 ` Gupta, Anshuman
2021-01-27 8:52 ` Gupta, Anshuman
2021-01-27 6:50 ` [Intel-gfx] [PATCH v2 4/4] drm/i915/hdcp: disable the QSES check for HDCP2.2 over MST Juston Li
2021-01-27 7:28 ` Gupta, Anshuman
2021-01-27 7:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/4] drm/i915/hdcp: Disable the QSES check for HDCP 1.4 " Patchwork
2021-01-27 7:46 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-01-27 11:14 ` Gupta, Anshuman
2021-01-27 17:53 ` Vudum, Lakshminarayana
2021-01-27 17:05 ` Patchwork
2021-01-27 17:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-27 21:08 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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