Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Zhenyu Wang <zhenyuw@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/2] drm/i915/gvt: Purge dev_priv->gt
Date: Fri, 29 Jan 2021 15:52:59 +0800	[thread overview]
Message-ID: <20210129075259.GU1538@zhen-hp.sh.intel.com> (raw)
In-Reply-To: <20210129004933.29755-2-chris@chris-wilson.co.uk>


[-- Attachment #1.1: Type: text/plain, Size: 2963 bytes --]

On 2021.01.29 00:49:33 +0000, Chris Wilson wrote:
> Use the right intel_gt stored as a backpointer in intel_vgpu.
> 
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> ---

Reviewed-by: Zhenyu Wang <zhenyuw@linux.intel.com>

I'll queue these two. Thanks!

>  drivers/gpu/drm/i915/gvt/execlist.c  | 8 +++-----
>  drivers/gpu/drm/i915/gvt/scheduler.c | 3 +--
>  2 files changed, 4 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gvt/execlist.c b/drivers/gpu/drm/i915/gvt/execlist.c
> index 158873f269b1..c8dcda6d4f0d 100644
> --- a/drivers/gpu/drm/i915/gvt/execlist.c
> +++ b/drivers/gpu/drm/i915/gvt/execlist.c
> @@ -522,12 +522,11 @@ static void init_vgpu_execlist(struct intel_vgpu *vgpu,
>  static void clean_execlist(struct intel_vgpu *vgpu,
>  			   intel_engine_mask_t engine_mask)
>  {
> -	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
> -	struct intel_engine_cs *engine;
>  	struct intel_vgpu_submission *s = &vgpu->submission;
> +	struct intel_engine_cs *engine;
>  	intel_engine_mask_t tmp;
>  
> -	for_each_engine_masked(engine, &dev_priv->gt, engine_mask, tmp) {
> +	for_each_engine_masked(engine, vgpu->gvt->gt, engine_mask, tmp) {
>  		kfree(s->ring_scan_buffer[engine->id]);
>  		s->ring_scan_buffer[engine->id] = NULL;
>  		s->ring_scan_buffer_size[engine->id] = 0;
> @@ -537,11 +536,10 @@ static void clean_execlist(struct intel_vgpu *vgpu,
>  static void reset_execlist(struct intel_vgpu *vgpu,
>  			   intel_engine_mask_t engine_mask)
>  {
> -	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
>  	struct intel_engine_cs *engine;
>  	intel_engine_mask_t tmp;
>  
> -	for_each_engine_masked(engine, &dev_priv->gt, engine_mask, tmp)
> +	for_each_engine_masked(engine, vgpu->gvt->gt, engine_mask, tmp)
>  		init_vgpu_execlist(vgpu, engine);
>  }
>  
> diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c
> index 43f31c2eab14..a55ae50dbbe1 100644
> --- a/drivers/gpu/drm/i915/gvt/scheduler.c
> +++ b/drivers/gpu/drm/i915/gvt/scheduler.c
> @@ -1015,13 +1015,12 @@ void intel_vgpu_clean_workloads(struct intel_vgpu *vgpu,
>  				intel_engine_mask_t engine_mask)
>  {
>  	struct intel_vgpu_submission *s = &vgpu->submission;
> -	struct drm_i915_private *dev_priv = vgpu->gvt->gt->i915;
>  	struct intel_engine_cs *engine;
>  	struct intel_vgpu_workload *pos, *n;
>  	intel_engine_mask_t tmp;
>  
>  	/* free the unsubmited workloads in the queues. */
> -	for_each_engine_masked(engine, &dev_priv->gt, engine_mask, tmp) {
> +	for_each_engine_masked(engine, vgpu->gvt->gt, engine_mask, tmp) {
>  		list_for_each_entry_safe(pos, n,
>  			&s->workload_q_head[engine->id], list) {
>  			list_del_init(&pos->list);
> -- 
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 195 bytes --]

[-- Attachment #2: Type: text/plain, Size: 160 bytes --]

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2021-01-29  8:08 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-29  0:49 [Intel-gfx] [PATCH 1/2] drm/i915/gvt: Parse default state to update reg whitelist Chris Wilson
2021-01-29  0:49 ` [Intel-gfx] [PATCH 2/2] drm/i915/gvt: Purge dev_priv->gt Chris Wilson
2021-01-29  7:52   ` Zhenyu Wang [this message]
2021-01-29  1:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/gvt: Parse default state to update reg whitelist Patchwork
2021-01-29  5:05 ` [Intel-gfx] [PATCH 1/2] " Zhenyu Wang
2021-01-29 13:47 ` [Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210129075259.GU1538@zhen-hp.sh.intel.com \
    --to=zhenyuw@linux.intel.com \
    --cc=chris@chris-wilson.co.uk \
    --cc=intel-gfx@lists.freedesktop.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox