From: "José Roberto de Souza" <jose.souza@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 2/4] drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl()
Date: Tue, 9 Feb 2021 10:14:37 -0800 [thread overview]
Message-ID: <20210209181439.215104-2-jose.souza@intel.com> (raw)
In-Reply-To: <20210209181439.215104-1-jose.souza@intel.com>
There is no support for two pipes one transcoder for PSR and if we had
that the current code should not use cpu_transcoder.
Also I can't see a scenario where crtc_state->enable_psr2_sel_fetch is
set and PSR is not enabled and if by a bug it happens PSR HW will just
ignore any value in set in PSR2_MAN_TRK_CTL.
So dropping all the rest and keeping the same behavior that we have
with intel_psr2_program_plane_sel_fetch().
Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 14 ++------------
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 1d3903612fcb..8ad9fcff3a12 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1226,23 +1226,13 @@ void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
- struct intel_encoder *encoder;
if (!HAS_PSR2_SEL_FETCH(dev_priv) ||
!crtc_state->enable_psr2_sel_fetch)
return;
- for_each_intel_encoder_mask_with_psr(&dev_priv->drm, encoder,
- crtc_state->uapi.encoder_mask) {
- struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
-
- if (!intel_dp->psr.enabled)
- continue;
-
- intel_de_write(dev_priv,
- PSR2_MAN_TRK_CTL(crtc_state->cpu_transcoder),
- crtc_state->psr2_man_track_ctl);
- }
+ intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(crtc_state->cpu_transcoder),
+ crtc_state->psr2_man_track_ctl);
}
static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
--
2.30.0
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next prev parent reply other threads:[~2021-02-09 18:13 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-09 18:14 [Intel-gfx] [PATCH 1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr José Roberto de Souza
2021-02-09 18:14 ` José Roberto de Souza [this message]
2021-02-11 11:37 ` [Intel-gfx] [PATCH 2/4] drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl() Mun, Gwan-gyeong
2021-02-09 18:14 ` [Intel-gfx] [PATCH 3/4] drm/i915/display: Remove some redundancy around CAN_PSR() José Roberto de Souza
2021-02-22 9:48 ` Mun, Gwan-gyeong
2021-02-09 18:14 ` [Intel-gfx] [PATCH 4/4] drm/i915/display: Set source_support even if panel do not support PSR José Roberto de Souza
2021-02-22 9:57 ` Mun, Gwan-gyeong
2021-02-09 18:26 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915/display: Rename for_each_intel_encoder.*_can_psr to for_each_intel_encoder.*_with_psr Patchwork
2021-02-09 18:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-02-09 18:55 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-09 22:49 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-02-11 11:34 ` [Intel-gfx] [PATCH 1/4] " Mun, Gwan-gyeong
2021-02-11 11:34 ` Mun, Gwan-gyeong
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