From: Tomas Winkler <tomas.winkler@intel.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Jani Nikula <jani.nikula@linux.intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Alexander Usyskin <alexander.usyskin@intel.com>,
intel-gfx@lists.freedesktop.org,
Lucas De Marchi <lucas.demarchi@intel.com>,
linux-mtd@lists.infradead.org,
Tomas Winkler <tomas.winkler@intel.com>,
Vitaly Lubart <vitaly.lubart@intel.com>
Subject: [Intel-gfx] [RFC PATCH 7/9] drm/i915/spi: mtd: implement access handlers
Date: Tue, 16 Feb 2021 20:19:23 +0200 [thread overview]
Message-ID: <20210216181925.650082-8-tomas.winkler@intel.com> (raw)
In-Reply-To: <20210216181925.650082-1-tomas.winkler@intel.com>
Implement mtd read, erase, and write handlers.
For erase operation address and size should be 4K aligned.
For write operation address and size has to be 4bytes aligned.
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Vitaly Lubart <vitaly.lubart@intel.com>
---
drivers/gpu/drm/i915/spi/intel_spi_drv.c | 138 +++++++++++++++++++++--
1 file changed, 131 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/spi/intel_spi_drv.c b/drivers/gpu/drm/i915/spi/intel_spi_drv.c
index bdf58e14fd6b..1e8a40339e6d 100644
--- a/drivers/gpu/drm/i915/spi/intel_spi_drv.c
+++ b/drivers/gpu/drm/i915/spi/intel_spi_drv.c
@@ -173,7 +173,6 @@ static int i915_spi_is_valid(struct i915_spi *spi)
return 0;
}
-__maybe_unused
static unsigned int spi_get_region(const struct i915_spi *spi, loff_t from)
{
unsigned int i;
@@ -188,7 +187,6 @@ static unsigned int spi_get_region(const struct i915_spi *spi, loff_t from)
return i;
}
-__maybe_unused
static ssize_t spi_write(struct i915_spi *spi, u8 region,
loff_t to, size_t len, const unsigned char *buf)
{
@@ -219,7 +217,6 @@ static ssize_t spi_write(struct i915_spi *spi, u8 region,
return len;
}
-__maybe_unused
static ssize_t spi_read(struct i915_spi *spi, u8 region,
loff_t from, size_t len, unsigned char *buf)
{
@@ -261,7 +258,6 @@ static ssize_t spi_read(struct i915_spi *spi, u8 region,
return len;
}
-__maybe_unused
static ssize_t
spi_erase(struct i915_spi *spi, u8 region, loff_t from, u64 len, u64 *fail_addr)
{
@@ -350,7 +346,63 @@ static int i915_spi_init(struct i915_spi *spi, struct device *device)
static int i915_spi_erase(struct mtd_info *mtd, struct erase_info *info)
{
- dev_err(&mtd->dev, "erasing %lld %lld\n", info->addr, info->len);
+ struct i915_spi *spi;
+ unsigned int idx;
+ u8 region;
+ u64 addr;
+ ssize_t bytes;
+ loff_t from;
+ size_t len;
+ size_t total_len;
+
+ if (!mtd || !info)
+ return -EINVAL;
+
+ spi = mtd->priv;
+
+ if (!IS_ALIGNED(info->addr, SZ_4K) || !IS_ALIGNED(info->len, SZ_4K)) {
+ dev_err(&mtd->dev, "unaligned erase %llx %llx\n",
+ info->addr, info->len);
+ info->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
+ return -EINVAL;
+ }
+
+ total_len = info->len;
+ addr = info->addr;
+
+ while (total_len > 0) {
+ if (!IS_ALIGNED(addr, SZ_4K) || !IS_ALIGNED(total_len, SZ_4K)) {
+ dev_err(&mtd->dev, "unaligned erase %llx %zx\n", addr, total_len);
+ info->fail_addr = addr;
+ return -ERANGE;
+ }
+
+ idx = spi_get_region(spi, addr);
+ if (idx >= spi->nregions) {
+ dev_err(&mtd->dev, "out of range");
+ info->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
+ return -ERANGE;
+ }
+
+ from = addr - spi->regions[idx].offset;
+ region = spi->regions[idx].id;
+ len = total_len;
+ if (len > spi->regions[idx].size - from)
+ len = spi->regions[idx].size - from;
+
+ dev_dbg(&mtd->dev, "erasing region[%d] %s from %llx len %zx\n",
+ region, spi->regions[idx].name, from, len);
+
+ bytes = spi_erase(spi, region, from, len, &info->fail_addr);
+ if (bytes < 0) {
+ dev_dbg(&mtd->dev, "erase failed with %zd\n", bytes);
+ info->fail_addr += spi->regions[idx].offset;
+ return bytes;
+ }
+
+ addr += len;
+ total_len -= len;
+ }
return 0;
}
@@ -358,7 +410,43 @@ static int i915_spi_erase(struct mtd_info *mtd, struct erase_info *info)
static int i915_spi_read(struct mtd_info *mtd, loff_t from, size_t len,
size_t *retlen, u_char *buf)
{
- dev_err(&mtd->dev, "read %lld %zd\n", from, len);
+ struct i915_spi *spi;
+ ssize_t ret;
+ unsigned int idx;
+ u8 region;
+
+ if (!mtd)
+ return -EINVAL;
+
+ spi = mtd->priv;
+
+ if (!IS_ALIGNED(from, sizeof(u32))) {
+ dev_err(&mtd->dev, "unaligned read %lld %zd\n", from, len);
+ return -EINVAL;
+ }
+
+ idx = spi_get_region(spi, from);
+
+ dev_dbg(&mtd->dev, "reading region[%d] %s from %lld len %zd\n",
+ spi->regions[idx].id, spi->regions[idx].name, from, len);
+
+ if (idx >= spi->nregions) {
+ dev_err(&mtd->dev, "out of ragnge");
+ return -ERANGE;
+ }
+
+ from -= spi->regions[idx].offset;
+ region = spi->regions[idx].id;
+ if (len > spi->regions[idx].size - from)
+ len = spi->regions[idx].size - from;
+
+ ret = spi_read(spi, region, from, len, buf);
+ if (ret < 0) {
+ dev_dbg(&mtd->dev, "read failed with %zd\n", ret);
+ return ret;
+ }
+
+ *retlen = ret;
return 0;
}
@@ -366,7 +454,43 @@ static int i915_spi_read(struct mtd_info *mtd, loff_t from, size_t len,
static int i915_spi_write(struct mtd_info *mtd, loff_t to, size_t len,
size_t *retlen, const u_char *buf)
{
- dev_err(&mtd->dev, "writing %lld %zd\n", to, len);
+ struct i915_spi *spi;
+ ssize_t ret;
+ unsigned int idx;
+ u8 region;
+
+ if (!mtd)
+ return -EINVAL;
+
+ spi = mtd->priv;
+
+ if (!(IS_ALIGNED(len, 4) && IS_ALIGNED(to, 4))) {
+ dev_err(&mtd->dev, "unaligned write %lld %zd\n", to, len);
+ return -EINVAL;
+ }
+
+ idx = spi_get_region(spi, to);
+
+ dev_dbg(&mtd->dev, "writing region[%d] %s to %lld len %zd\n",
+ spi->regions[idx].id, spi->regions[idx].name, to, len);
+
+ if (idx >= spi->nregions) {
+ dev_err(&mtd->dev, "out of range");
+ return -ERANGE;
+ }
+
+ to -= spi->regions[idx].offset;
+ region = spi->regions[idx].id;
+ if (len > spi->regions[idx].size - to)
+ len = spi->regions[idx].size - to;
+
+ ret = spi_write(spi, region, to, len, buf);
+ if (ret < 0) {
+ dev_dbg(&mtd->dev, "write failed with %zd\n", ret);
+ return ret;
+ }
+
+ *retlen = ret;
return 0;
}
--
2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-02-16 18:20 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-16 18:19 [Intel-gfx] [RFC PATCH 0/9] drm/i915/spi: discrete graphics internal spi Tomas Winkler
2021-02-16 18:19 ` [Intel-gfx] [RFC PATCH 1/9] drm/i915/spi: add spi device for discrete graphics Tomas Winkler
2021-02-17 10:42 ` Jani Nikula
2021-02-17 17:14 ` Lucas De Marchi
2021-02-17 19:02 ` Winkler, Tomas
2021-02-16 18:19 ` [Intel-gfx] [RFC PATCH 2/9] drm/i915/spi: intel_spi_region map Tomas Winkler
2021-02-17 10:46 ` Jani Nikula
2021-02-17 20:45 ` Winkler, Tomas
2021-02-22 10:17 ` Jani Nikula
2021-02-22 11:30 ` Winkler, Tomas
2021-02-16 18:19 ` [Intel-gfx] [RFC PATCH 3/9] drm/i915/spi: add driver for on-die spi device Tomas Winkler
2021-02-17 10:56 ` Jani Nikula
2021-02-17 20:58 ` Winkler, Tomas
2021-02-18 9:49 ` Lucas De Marchi
2021-02-18 10:50 ` Winkler, Tomas
2021-02-19 6:06 ` Winkler, Tomas
2021-02-19 22:59 ` Lucas De Marchi
2021-02-20 17:56 ` Winkler, Tomas
2021-02-16 18:19 ` [Intel-gfx] [RFC PATCH 4/9] drm/i915/spi: implement region enumeration Tomas Winkler
2021-02-16 18:19 ` [Intel-gfx] [RFC PATCH 5/9] drm/i915/spi: implement spi access functions Tomas Winkler
2021-02-16 18:19 ` [Intel-gfx] [RFC PATCH 6/9] drm/i915/spi: spi register with mtd Tomas Winkler
2021-02-16 18:19 ` Tomas Winkler [this message]
2021-02-16 18:19 ` [Intel-gfx] [RFC PATCH 8/9] drm/i915/spi: serialize spi access Tomas Winkler
2021-02-16 18:19 ` [Intel-gfx] [RFC PATCH 9/9] mtd: use refcount to prevent corruption Tomas Winkler
2021-02-16 18:45 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/spi: discrete graphics internal spi Patchwork
2021-02-16 18:47 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-02-16 19:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-02-16 20:35 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-02-16 23:01 ` [Intel-gfx] [RFC PATCH 0/9] " Richard Weinberger
2021-02-17 8:34 ` Winkler, Tomas
2021-02-21 7:10 ` Winkler, Tomas
2021-02-22 22:38 ` Richard Weinberger
2021-02-23 6:31 ` Winkler, Tomas
2021-02-28 6:52 ` Winkler, Tomas
2021-02-17 10:36 ` Jani Nikula
2021-02-17 12:50 ` Winkler, Tomas
2021-02-17 13:35 ` Jani Nikula
2021-02-17 18:33 ` Rodrigo Vivi
2021-02-17 11:02 ` Jani Nikula
2021-02-17 13:56 ` Winkler, Tomas
2021-03-01 12:33 ` Jani Nikula
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210216181925.650082-8-tomas.winkler@intel.com \
--to=tomas.winkler@intel.com \
--cc=alexander.usyskin@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@linux.intel.com \
--cc=joonas.lahtinen@linux.intel.com \
--cc=linux-mtd@lists.infradead.org \
--cc=lucas.demarchi@intel.com \
--cc=miquel.raynal@bootlin.com \
--cc=richard@nod.at \
--cc=rodrigo.vivi@intel.com \
--cc=vigneshr@ti.com \
--cc=vitaly.lubart@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox