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From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 11/11] drm/i915/adl_p: Enable remapping to pad DPT FB strides to POT
Date: Wed, 14 Apr 2021 18:52:08 +0300	[thread overview]
Message-ID: <20210414155208.3161335-12-imre.deak@intel.com> (raw)
In-Reply-To: <20210414155208.3161335-1-imre.deak@intel.com>

Enable padding of DPT FB strides to POT, using the FB remapping logic.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 16 ++++++++++++----
 drivers/gpu/drm/i915/display/intel_fb.c      |  7 +++++--
 drivers/gpu/drm/i915/display/intel_fb.h      |  1 +
 3 files changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 2eba13898fbea..bb5cb3f37c408 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -227,16 +227,22 @@ static void dpt_cleanup(struct i915_address_space *vm)
 }
 
 static struct i915_address_space *
-intel_dpt_create(struct drm_gem_object *obj)
+intel_dpt_create(struct intel_framebuffer *fb)
 {
+	struct drm_gem_object *obj = &intel_fb_obj(&fb->base)->base;
 	struct drm_i915_private *i915 = to_i915(obj->dev);
-	size_t size = DIV_ROUND_UP_ULL(obj->size, 512);
 	struct drm_i915_gem_object *dpt_obj;
 	struct i915_address_space *vm;
 	struct i915_dpt *dpt;
+	size_t size;
 	int ret;
 
-	size = round_up(size, 4096);
+	if (intel_fb_needs_pot_stride_remap(fb))
+		size = intel_remapped_info_size(&fb->remapped_view.gtt.remapped);
+	else
+		size = DIV_ROUND_UP_ULL(obj->size, I915_GTT_PAGE_SIZE);
+
+	size = round_up(size * sizeof(gen8_pte_t), I915_GTT_PAGE_SIZE);
 
 	dpt_obj = i915_gem_object_create_stolen(i915, size);
 	if (IS_ERR(dpt_obj))
@@ -11558,8 +11564,10 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
 			}
 		}
 
+		/* TODO: Add POT stride remapping support for CCS formats as well. */
 		if (IS_ALDERLAKE_P(dev_priv) &&
 		    mode_cmd->modifier[i] != DRM_FORMAT_MOD_LINEAR &&
+		    !intel_fb_needs_pot_stride_remap(intel_fb) &&
 		    !is_power_of_2(mode_cmd->pitches[i])) {
 			drm_dbg_kms(&dev_priv->drm,
 				    "plane %d pitch (%d) must be power of two for tiled buffers\n",
@@ -11577,7 +11585,7 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
 	if (intel_fb_uses_dpt(fb)) {
 		struct i915_address_space *vm;
 
-		vm = intel_dpt_create(&obj->base);
+		vm = intel_dpt_create(intel_fb);
 		if (IS_ERR(vm)) {
 			ret = PTR_ERR(vm);
 			goto err;
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 2ee10ece27c57..ebfee5e7cbc8b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -486,9 +486,12 @@ static bool intel_plane_can_remap(const struct intel_plane_state *plane_state)
 	return true;
 }
 
-static bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
+bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb)
 {
-	return false;
+	struct drm_i915_private *i915 = to_i915(fb->base.dev);
+
+	return IS_ALDERLAKE_P(i915) && fb->base.modifier != DRM_FORMAT_MOD_LINEAR &&
+	       !is_ccs_modifier(fb->base.modifier);
 }
 
 static int intel_fb_pitch(const struct intel_framebuffer *fb, int color_plane, unsigned int rotation)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index 47716487de19c..f1c9754001e52 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -46,6 +46,7 @@ u32 intel_plane_compute_aligned_offset(int *x, int *y,
 				       const struct intel_plane_state *state,
 				       int color_plane);
 
+bool intel_fb_needs_pot_stride_remap(const struct intel_framebuffer *fb);
 bool intel_fb_supports_90_270_rotation(const struct intel_framebuffer *fb);
 
 int intel_fill_fb_info(struct drm_i915_private *i915, struct intel_framebuffer *fb);
-- 
2.27.0

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  parent reply	other threads:[~2021-04-14 15:52 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-04-14 15:51 [Intel-gfx] [PATCH 00/11] drm/i915/adl_p: Add support for Display Page Tables Imre Deak
2021-04-14 15:51 ` [Intel-gfx] [PATCH 01/11] drm/i915: Pass intel_framebuffer instad of drm_framebuffer to intel_fill_fb_info() Imre Deak
2021-04-14 15:51 ` [Intel-gfx] [PATCH 02/11] drm/i915/xelpd: add XE_LPD display characteristics Imre Deak
2021-05-05 23:55   ` Souza, Jose
2021-04-14 15:52 ` [Intel-gfx] [PATCH 03/11] drm/i915/adl_p: Add PCI Devices IDs Imre Deak
2021-04-14 15:52 ` [Intel-gfx] [PATCH 04/11] drm/i915/adl_p: ADL_P device info enabling Imre Deak
2021-05-05 23:54   ` Souza, Jose
2021-04-14 15:52 ` [Intel-gfx] [PATCH 05/11] drm/i915/xelpd: First stab at DPT support Imre Deak
2021-04-14 15:52 ` [Intel-gfx] [PATCH 06/11] drm/i915/xelpd: Fallback to plane stride limitations when using DPT Imre Deak
2021-04-14 15:52 ` [Intel-gfx] [PATCH 07/11] drm/i915/xelpd: Support 128k plane stride Imre Deak
2021-04-14 15:52 ` [Intel-gfx] [PATCH 08/11] drm/i915/adl_p: Add stride restriction when using DPT Imre Deak
2021-04-14 15:52 ` [Intel-gfx] [PATCH 09/11] drm/i915/adl_p: Disable support for 90/270 FB rotation Imre Deak
2021-04-14 15:52 ` [Intel-gfx] [PATCH 10/11] drm/i915/adl_p: Require a minimum of 8 tiles stride for DPT FBs Imre Deak
2021-04-15 22:12   ` Imre Deak
2021-05-06 11:11     ` Kahola, Mika
2021-04-14 15:52 ` Imre Deak [this message]
2021-04-14 17:22 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/adl_p: Add support for Display Page Tables Patchwork
2021-04-14 17:50 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-04-14 20:32 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-04-15 11:29 ` [Intel-gfx] [PATCH 00/11] " Jani Nikula
2021-04-21 11:03   ` Jani Nikula
2021-04-21 11:24     ` Imre Deak
2021-04-21 12:12       ` Jani Nikula
2021-04-21 19:21         ` Imre Deak

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