From: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 0/1] Add support for querying engine cycles
Date: Mon, 3 May 2021 17:12:12 -0700 [thread overview]
Message-ID: <20210504001213.69573-1-umesh.nerlige.ramappa@intel.com> (raw)
This is just a refresh of the earlier patch along with cover letter for the IGT
testing. The query provides the engine cs cycles counter.
v2: Use GRAPHICS_VER() instead of IG_GEN()
v3: Add R-b to the patch
v4: Split cpu timestamp array into timestamp and delta for cleaner API
v5: Add width of the cs cycles to the uapi
Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Test-with: 20210504001003.69445-1-umesh.nerlige.ramappa@intel.com
Umesh Nerlige Ramappa (1):
i915/query: Correlate engine and cpu timestamps with better accuracy
drivers/gpu/drm/i915/i915_query.c | 157 ++++++++++++++++++++++++++++++
include/uapi/drm/i915_drm.h | 56 +++++++++++
2 files changed, 213 insertions(+)
--
2.20.1
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next reply other threads:[~2021-05-04 0:12 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-04 0:12 Umesh Nerlige Ramappa [this message]
2021-05-04 0:12 ` [Intel-gfx] [PATCH 1/1] i915/query: Correlate engine and cpu timestamps with better accuracy Umesh Nerlige Ramappa
2021-05-04 1:12 ` [Intel-gfx] ✗ Fi.CI.DOCS: warning for Add support for querying engine cycles Patchwork
2021-05-04 1:37 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2021-04-29 0:34 [Intel-gfx] [PATCH 0/1] " Umesh Nerlige Ramappa
2021-04-27 21:53 Umesh Nerlige Ramappa
2021-04-27 21:49 Umesh Nerlige Ramappa
2021-04-21 17:28 Umesh Nerlige Ramappa
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