From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Matthew Auld" <matthew.auld@intel.com>
Subject: [Intel-gfx] [PATCH v3 03/12] drm/i915: Fix i915_sg_page_sizes to record dma segments rather than physical pages
Date: Fri, 21 May 2021 17:32:44 +0200 [thread overview]
Message-ID: <20210521153253.518037-4-thomas.hellstrom@linux.intel.com> (raw)
In-Reply-To: <20210521153253.518037-1-thomas.hellstrom@linux.intel.com>
All users of this function actually want the dma segment sizes, but that's
not what's calculated. Fix that and rename the function to
i915_sg_dma_sizes to reflect what's calculated.
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
---
drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_phys.c | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 2 +-
drivers/gpu/drm/i915/i915_scatterlist.h | 16 ++++++++++++----
4 files changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
index ccede73c6465..616c3a2f1baf 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c
@@ -209,7 +209,7 @@ static int i915_gem_object_get_pages_dmabuf(struct drm_i915_gem_object *obj)
if (IS_ERR(pages))
return PTR_ERR(pages);
- sg_page_sizes = i915_sg_page_sizes(pages->sgl);
+ sg_page_sizes = i915_sg_dma_sizes(pages->sgl);
__i915_gem_object_set_pages(obj, pages, sg_page_sizes);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_phys.c b/drivers/gpu/drm/i915/gem/i915_gem_phys.c
index 81dc2bf59bc3..36f373dc493c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_phys.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_phys.c
@@ -208,7 +208,7 @@ static int i915_gem_object_shmem_to_phys(struct drm_i915_gem_object *obj)
err_xfer:
if (!IS_ERR_OR_NULL(pages)) {
- unsigned int sg_page_sizes = i915_sg_page_sizes(pages->sgl);
+ unsigned int sg_page_sizes = i915_sg_dma_sizes(pages->sgl);
__i915_gem_object_set_pages(obj, pages, sg_page_sizes);
}
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
index a657b99ec760..602f0ed983ec 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_userptr.c
@@ -173,7 +173,7 @@ static int i915_gem_userptr_get_pages(struct drm_i915_gem_object *obj)
goto err;
}
- sg_page_sizes = i915_sg_page_sizes(st->sgl);
+ sg_page_sizes = i915_sg_dma_sizes(st->sgl);
__i915_gem_object_set_pages(obj, st, sg_page_sizes);
diff --git a/drivers/gpu/drm/i915/i915_scatterlist.h b/drivers/gpu/drm/i915/i915_scatterlist.h
index 9cb26a224034..b96baad66a3a 100644
--- a/drivers/gpu/drm/i915/i915_scatterlist.h
+++ b/drivers/gpu/drm/i915/i915_scatterlist.h
@@ -101,15 +101,23 @@ static inline struct scatterlist *__sg_next(struct scatterlist *sg)
(((__iter).curr += PAGE_SIZE) >= (__iter).max) ? \
(__iter) = __sgt_iter(__sg_next((__iter).sgp), false), 0 : 0)
-static inline unsigned int i915_sg_page_sizes(struct scatterlist *sg)
+/**
+ * i915_sg_dma_sizes - Record the dma segment sizes of a scatterlist
+ * @sg: The scatterlist
+ *
+ * Return: An unsigned int with segment sizes logically or'ed together.
+ * A caller can use this information to determine what hardware page table
+ * entry sizes can be used to map the memory represented by the scatterlist.
+ */
+static inline unsigned int i915_sg_dma_sizes(struct scatterlist *sg)
{
unsigned int page_sizes;
page_sizes = 0;
- while (sg) {
+ while (sg && sg_dma_len(sg)) {
GEM_BUG_ON(sg->offset);
- GEM_BUG_ON(!IS_ALIGNED(sg->length, PAGE_SIZE));
- page_sizes |= sg->length;
+ GEM_BUG_ON(!IS_ALIGNED(sg_dma_len(sg), PAGE_SIZE));
+ page_sizes |= sg_dma_len(sg);
sg = __sg_next(sg);
}
--
2.31.1
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next prev parent reply other threads:[~2021-05-21 15:33 UTC|newest]
Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-21 15:32 [Intel-gfx] [PATCH v3 00/12] drm/i915: Move LMEM (VRAM) management over to TTM Thomas Hellström
2021-05-21 15:32 ` [Intel-gfx] [PATCH v3 01/12] drm/i915: Untangle the vma pages_mutex Thomas Hellström
2021-05-21 15:32 ` [Intel-gfx] [PATCH v3 02/12] drm/i915: Don't free shared locks while shared Thomas Hellström
2021-05-21 15:32 ` Thomas Hellström [this message]
2021-05-21 15:32 ` [Intel-gfx] [PATCH v3 04/12] drm/i915/ttm Initialize the ttm device and memory managers Thomas Hellström
2021-05-21 15:32 ` [Intel-gfx] [PATCH v3 05/12] drm/i915/ttm: Embed a ttm buffer object in the i915 gem object Thomas Hellström
2021-05-21 15:32 ` [Intel-gfx] [PATCH v3 06/12] drm/ttm: Add a generic TTM memcpy move for page-based iomem Thomas Hellström
2021-05-25 9:18 ` Matthew Auld
2021-05-25 9:32 ` Thomas Hellström
2021-05-25 9:58 ` Matthew Auld
2021-05-25 10:07 ` Thomas Hellström
2021-05-25 15:48 ` Christian König
2021-05-26 7:39 ` Thomas Hellström
2021-05-26 10:45 ` Christian König
2021-05-26 10:57 ` Thomas Hellström
2021-05-21 15:32 ` [Intel-gfx] [PATCH v3 07/12] drm, drm/i915: Move the memcpy_from_wc functionality to core drm Thomas Hellström
2021-05-24 16:45 ` Matthew Auld
2021-05-24 18:12 ` Thomas Hellström
2021-05-21 15:32 ` [Intel-gfx] [PATCH v3 08/12] drm/ttm: Use drm_memcpy_from_wc_dbm for TTM bo moves Thomas Hellström
2021-05-24 18:16 ` Matthew Auld
2021-05-24 18:47 ` Thomas Hellström
2021-05-26 12:48 ` Christian König
2021-05-21 15:32 ` [Intel-gfx] [PATCH v3 09/12] drm/ttm: Document and optimize ttm_bo_pipeline_gutting() Thomas Hellström
2021-05-25 11:00 ` Matthew Auld
2021-05-25 13:37 ` Thomas Hellström
2021-05-21 15:32 ` [Intel-gfx] [PATCH v3 10/12] drm/ttm, drm/amdgpu: Allow the driver some control over swapping Thomas Hellström
2021-05-21 15:32 ` [Intel-gfx] [PATCH v3 11/12] drm/i915/ttm: Introduce a TTM i915 gem object backend Thomas Hellström
2021-05-21 15:32 ` [Intel-gfx] [PATCH v3 12/12] drm/i915/lmem: Verify checks for lmem residency Thomas Hellström
2021-05-21 16:06 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Move LMEM (VRAM) management over to TTM (rev3) Patchwork
2021-05-21 16:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-05-21 16:36 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-05-24 0:10 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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