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From: Matthew Auld <matthew.auld@intel.com>
To: igt-dev@lists.freedesktop.org
Cc: intel-gfx@lists.freedesktop.org,
	Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Subject: [Intel-gfx] [PATCH i-g-t v3 8/9] tests/i915/gem_create: exercise placements extension
Date: Wed, 26 May 2021 14:00:24 +0100	[thread overview]
Message-ID: <20210526130025.249629-8-matthew.auld@intel.com> (raw)
In-Reply-To: <20210526130025.249629-1-matthew.auld@intel.com>

Add some explicit testcases for the create_ext placements extension.

Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Acked-by: Petri Latvala <petri.latvala@intel.com>
---
 tests/i915/gem_create.c | 188 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 188 insertions(+)

diff --git a/tests/i915/gem_create.c b/tests/i915/gem_create.c
index 8acc2f52..167d7d28 100644
--- a/tests/i915/gem_create.c
+++ b/tests/i915/gem_create.c
@@ -290,6 +290,184 @@ static void size_update(int fd)
 	igt_assert_neq(create.size, size_initial_nonaligned);
 }
 
+static void create_ext_placement_sanity_check(int fd)
+{
+	struct drm_i915_query_memory_regions *regions;
+	struct drm_i915_gem_create_ext_memory_regions setparam_region = {
+		.base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+	};
+	struct drm_i915_gem_memory_class_instance *uregions;
+	struct drm_i915_gem_memory_class_instance region_smem = {
+		.memory_class = I915_MEMORY_CLASS_SYSTEM,
+		.memory_instance = 0,
+	};
+	struct drm_i915_gem_memory_class_instance region_invalid = {
+		.memory_class = -1,
+		.memory_instance = -1,
+	};
+	uint64_t size;
+	uint32_t handle;
+	int i;
+
+	regions = gem_get_query_memory_regions(fd);
+	igt_assert(regions);
+	igt_assert(regions->num_regions);
+
+	/*
+	 * extensions should be optional, giving us the normal gem_create
+	 * behaviour.
+	 */
+	size = PAGE_SIZE;
+	igt_assert_eq(__gem_create_ext(fd, &size, &handle, 0), 0);
+	gem_close(fd, handle);
+
+	/* Try some uncreative invalid combinations */
+	setparam_region.regions = to_user_pointer(&region_smem);
+	setparam_region.num_regions = 0;
+	size = PAGE_SIZE;
+	igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+					&setparam_region.base), 0);
+
+	setparam_region.regions = to_user_pointer(&region_smem);
+	setparam_region.num_regions = regions->num_regions + 1;
+	size = PAGE_SIZE;
+	igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+					&setparam_region.base), 0);
+
+	setparam_region.regions = to_user_pointer(&region_smem);
+	setparam_region.num_regions = -1;
+	size = PAGE_SIZE;
+	igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+					&setparam_region.base), 0);
+
+	setparam_region.regions = to_user_pointer(&region_invalid);
+	setparam_region.num_regions = 1;
+	size = PAGE_SIZE;
+	igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+					&setparam_region.base), 0);
+
+	setparam_region.regions = to_user_pointer(&region_invalid);
+	setparam_region.num_regions = 0;
+	size = PAGE_SIZE;
+	igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+					&setparam_region.base), 0);
+
+	uregions = calloc(regions->num_regions + 1, sizeof(uint32_t));
+
+	for (i = 0; i < regions->num_regions; i++)
+		uregions[i] = regions->regions[i].region;
+
+	setparam_region.regions = to_user_pointer(uregions);
+	setparam_region.num_regions = regions->num_regions + 1;
+	size = PAGE_SIZE;
+	igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+					&setparam_region.base), 0);
+
+	if (regions->num_regions > 1)  {
+		for (i = 0; i < regions->num_regions; i++) {
+			struct drm_i915_gem_memory_class_instance dups[] = {
+				regions->regions[i].region,
+				regions->regions[i].region,
+			};
+
+			setparam_region.regions = to_user_pointer(dups);
+			setparam_region.num_regions = 2;
+			size = PAGE_SIZE;
+			igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+							&setparam_region.base), 0);
+		}
+	}
+
+	uregions[rand() % regions->num_regions].memory_class = -1;
+	uregions[rand() % regions->num_regions].memory_instance = -1;
+	setparam_region.regions = to_user_pointer(uregions);
+	setparam_region.num_regions = regions->num_regions;
+	size = PAGE_SIZE;
+	igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+					&setparam_region.base), 0);
+
+	free(uregions);
+
+	{
+		struct drm_i915_gem_create_ext_memory_regions setparam_region_next;
+
+		setparam_region.regions = to_user_pointer(&region_smem);
+		setparam_region.num_regions = 1;
+
+		setparam_region_next = setparam_region;
+		setparam_region.base.next_extension =
+				to_user_pointer(&setparam_region_next);
+
+		size = PAGE_SIZE;
+		igt_assert_neq(__gem_create_ext(fd, &size, &handle,
+						&setparam_region.base), 0);
+		setparam_region.base.next_extension = 0;
+	}
+
+	free(regions);
+}
+
+static void create_ext_placement_all(int fd)
+{
+	struct drm_i915_query_memory_regions *regions;
+	struct drm_i915_gem_create_ext_memory_regions setparam_region = {
+		.base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+	};
+	struct drm_i915_gem_memory_class_instance *uregions;
+	uint64_t size;
+	uint32_t handle;
+	int i;
+
+	regions = gem_get_query_memory_regions(fd);
+	igt_assert(regions);
+	igt_assert(regions->num_regions);
+
+	uregions = calloc(regions->num_regions, sizeof(*uregions));
+
+	for (i = 0; i < regions->num_regions; i++)
+		uregions[i] = regions->regions[i].region;
+
+	setparam_region.regions = to_user_pointer(uregions);
+	setparam_region.num_regions = regions->num_regions;
+
+	size = PAGE_SIZE;
+	igt_assert_eq(__gem_create_ext(fd, &size, &handle,
+				       &setparam_region.base), 0);
+	gem_close(fd, handle);
+	free(uregions);
+	free(regions);
+}
+
+static void create_ext_placement_each(int fd)
+{
+	struct drm_i915_query_memory_regions *regions;
+	struct drm_i915_gem_create_ext_memory_regions setparam_region = {
+		.base = { .name = I915_GEM_CREATE_EXT_MEMORY_REGIONS },
+	};
+	int i;
+
+	regions = gem_get_query_memory_regions(fd);
+	igt_assert(regions);
+	igt_assert(regions->num_regions);
+
+	for (i = 0; i < regions->num_regions; i++) {
+		struct drm_i915_gem_memory_class_instance region =
+			regions->regions[i].region;
+		uint64_t size;
+		uint32_t handle;
+
+		setparam_region.regions = to_user_pointer(&region);
+		setparam_region.num_regions = 1;
+
+		size = PAGE_SIZE;
+		igt_assert_eq(__gem_create_ext(fd, &size, &handle,
+					       &setparam_region.base), 0);
+		gem_close(fd, handle);
+	}
+
+	free(regions);
+}
+
 igt_main
 {
 	int fd = -1;
@@ -315,4 +493,14 @@ igt_main
 
 	igt_subtest("busy-create")
 		busy_create(fd, 30);
+
+	igt_subtest("create-ext-placement-sanity-check")
+		create_ext_placement_sanity_check(fd);
+
+	igt_subtest("create-ext-placement-each")
+		create_ext_placement_each(fd);
+
+	igt_subtest("create-ext-placement-all")
+		create_ext_placement_all(fd);
+
 }
-- 
2.26.3

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  parent reply	other threads:[~2021-05-26 13:00 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-26 13:00 [Intel-gfx] [PATCH i-g-t v3 1/9] i915_drm.h sync Matthew Auld
2021-05-26 13:00 ` [Intel-gfx] [PATCH i-g-t v3 2/9] lib/i915/gem_create: Add gem_create_ext Matthew Auld
2021-05-26 13:00 ` [Intel-gfx] [PATCH i-g-t v3 3/9] lib/i915/intel_memory_region: Add new memory region lib Matthew Auld
2021-05-26 13:00 ` [Intel-gfx] [PATCH i-g-t v3 4/9] tests/gem_gpgpu_fill: Convert from simple to standard igt_main Matthew Auld
2021-05-26 13:00 ` [Intel-gfx] [PATCH i-g-t v3 5/9] tests/i915/gem_exec_basic: Use memory region interface Matthew Auld
2021-05-26 13:00 ` [Intel-gfx] [PATCH i-g-t v3 6/9] tests/i915/gem_gpgpu_fill: " Matthew Auld
2021-05-26 13:00 ` [Intel-gfx] [PATCH i-g-t v3 7/9] tests/i915/gem_media_fill: " Matthew Auld
2021-05-26 13:00 ` Matthew Auld [this message]
2021-05-26 13:00 ` [Intel-gfx] [PATCH i-g-t v3 9/9] tests/i915/gem_exec_basic: Iterate over all memory regions Matthew Auld

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