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From: Anshuman Gupta <anshuman.gupta@intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915/ddi: Flush encoder power domain ref puts during driver unload
Date: Wed, 2 Jun 2021 13:36:51 +0530	[thread overview]
Message-ID: <20210602080650.GE8620@intel.com> (raw)
In-Reply-To: <20210526143729.2563672-1-imre.deak@intel.com>

On 2021-05-26 at 20:07:27 +0530, Imre Deak wrote:
> An async-put on an encoder specific power domain (for instance the AUX
> PW domain) may be pending when removing the encoder. Make sure any such
> async-puts are complete while the corresponding encoder is still in place
> since at least AUX power wells require this to do a power well->PHY
> lookup.
> 
> Signed-off-by: Imre Deak <imre.deak@intel.com>
Looks good to me.
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 3d89186741539..d0d11c9c8d13b 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -4063,9 +4063,11 @@ static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
>  
>  static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
>  {
> +	struct drm_i915_private *i915 = to_i915(encoder->dev);
>  	struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
>  
>  	intel_dp_encoder_flush_work(encoder);
> +	intel_display_power_flush_work(i915);
>  
>  	drm_encoder_cleanup(encoder);
>  	if (dig_port)
> -- 
> 2.27.0
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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      parent reply	other threads:[~2021-06-02  8:22 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-26 14:37 [Intel-gfx] [PATCH 1/3] drm/i915/ddi: Flush encoder power domain ref puts during driver unload Imre Deak
2021-05-26 14:37 ` [Intel-gfx] [PATCH 2/3] drm/i915: Fix incorrect assert about pending power domain async-put work Imre Deak
2021-06-02  9:05   ` Anshuman Gupta
2021-06-02 14:01     ` Imre Deak
2021-06-03  6:22       ` Gupta, Anshuman
2021-05-26 14:37 ` [Intel-gfx] [PATCH 3/3] drm/i915/adlp: Fix AUX power well -> PHY mapping Imre Deak
2021-06-03  9:43   ` Anshuman Gupta
2021-06-09 11:42   ` Jani Nikula
2021-06-09 12:34     ` Imre Deak
2021-05-26 21:18 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915/ddi: Flush encoder power domain ref puts during driver unload Patchwork
2021-05-27 10:02 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-05-27 18:04   ` Imre Deak
2021-05-27 19:41     ` Vudum, Lakshminarayana
2021-05-27 18:40 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2021-06-03 16:34   ` Imre Deak
2021-06-02  8:06 ` Anshuman Gupta [this message]

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