From: Matthew Auld <matthew.auld@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
dri-devel@lists.freedesktop.org,
"Daniel Vetter" <daniel.vetter@ffwll.ch>
Subject: [Intel-gfx] [PATCH] drm/i915/gem/mman: only allow WC for lmem
Date: Wed, 2 Jun 2021 10:36:36 +0100 [thread overview]
Message-ID: <20210602093636.167070-1-matthew.auld@intel.com> (raw)
For dgfx where we now have lmem and ttm, we can only support single mmap
mode for the lifetime of the object, and for lmem objects this should be
WC, so reject all other mapping modes for mmap_offset, including if the
object can be placed in both smem and lmem.
Signed-off-by: Matthew Auld <matthew.auld@intel.com>
Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
---
drivers/gpu/drm/i915/gem/i915_gem_mman.c | 4 ++++
drivers/gpu/drm/i915/gem/i915_gem_object.c | 22 ++++++++++++++++++++++
drivers/gpu/drm/i915/gem/i915_gem_object.h | 4 ++++
3 files changed, 30 insertions(+)
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_mman.c b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
index fd1c9714f8d8..32f88f236771 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_mman.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_mman.c
@@ -689,6 +689,10 @@ __assign_mmap_offset(struct drm_file *file,
goto out;
}
+ if (mmap_type != I915_MMAP_TYPE_WC &&
+ i915_gem_object_placements_contain_type(obj, INTEL_MEMORY_LOCAL))
+ return -ENODEV;
+
mmo = mmap_offset_attach(obj, mmap_type, file);
if (IS_ERR(mmo)) {
err = PTR_ERR(mmo);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.c b/drivers/gpu/drm/i915/gem/i915_gem_object.c
index 2be6109d0093..d4b0da8ed969 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.c
@@ -403,6 +403,28 @@ int i915_gem_object_read_from_page(struct drm_i915_gem_object *obj, u64 offset,
return 0;
}
+/**
+ * i915_gem_object_placements_contain_type - Check whether the object can be
+ * placed at certain memory type
+ * @obj: Pointer to the object
+ * @type: The memory type to check
+ *
+ * Return: True if the object can be placed in @type. False otherwise.
+ */
+bool i915_gem_object_placements_contain_type(struct drm_i915_gem_object *obj,
+ enum intel_memory_type type)
+{
+ unsigned int i;
+
+ /* TODO: consider maybe storing as a mask when doing gem_create_ext */
+ for (i = 0; i < obj->mm.n_placements; i++) {
+ if (obj->mm.placements[i]->type == type)
+ return true;
+ }
+
+ return false;
+}
+
void i915_gem_init__objects(struct drm_i915_private *i915)
{
INIT_WORK(&i915->mm.free_work, __i915_gem_free_work);
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object.h b/drivers/gpu/drm/i915/gem/i915_gem_object.h
index 2ebd79537aea..4d6ea9e07df0 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object.h
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object.h
@@ -12,6 +12,7 @@
#include <drm/drm_device.h>
#include "display/intel_frontbuffer.h"
+#include "intel_memory_region.h"
#include "i915_gem_object_types.h"
#include "i915_gem_gtt.h"
#include "i915_vma_types.h"
@@ -587,6 +588,9 @@ int i915_gem_object_read_from_page(struct drm_i915_gem_object *obj, u64 offset,
bool i915_gem_object_is_shmem(const struct drm_i915_gem_object *obj);
+bool i915_gem_object_placements_contain_type(struct drm_i915_gem_object *obj,
+ enum intel_memory_type type);
+
#ifdef CONFIG_MMU_NOTIFIER
static inline bool
i915_gem_object_is_userptr(struct drm_i915_gem_object *obj)
--
2.26.3
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next reply other threads:[~2021-06-02 9:37 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-02 9:36 Matthew Auld [this message]
2021-06-02 10:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem/mman: only allow WC for lmem Patchwork
2021-06-02 12:00 ` [Intel-gfx] [PATCH] " Thomas Hellström
2021-06-08 9:57 ` Matthew Auld
2021-06-08 10:06 ` Thomas Hellström
2021-06-02 18:42 ` [Intel-gfx] ✓ Fi.CI.IGT: success for " Patchwork
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