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From: Zhenyu Wang <zhenyuw@linux.intel.com>
To: Christoph Hellwig <hch@infradead.org>
Cc: Jani Nikula <jani.nikula@linux.intel.com>,
	Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	Zhenyu Wang <zhenyuw@linux.intel.com>,
	Zhi Wang <zhi.a.wang@intel.com>,
	intel-gfx@lists.freedesktop.org,
	intel-gvt-dev@lists.freedesktop.org
Subject: Re: [Intel-gfx] i915 timeouts delaying boot under GVT
Date: Mon, 16 Aug 2021 10:45:34 +0800	[thread overview]
Message-ID: <20210816024534.GV13928@zhen-hp.sh.intel.com> (raw)
In-Reply-To: <YRYRwG5jscfl54pj@infradead.org>

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On 2021.08.13 08:31:28 +0200, Christoph Hellwig wrote:
> Hi all,
> 
> when botting a current 4.14-rc tree in a VM using GVT-g (with the host
> also running a current 4.14-rc tree), I see bunch of long timeouts
> followed by i915 errors:
> 
> [    4.252066] i915 0000:00:03.0: [drm] VGT balloon successfully
> [    5.095190] i915 0000:00:03.0: [drm] *ERROR* Failed to disable SAGV (-110)
> [   15.334559] [drm:drm_atomic_helper_wait_for_flip_done] *ERROR* [CRTC:51:pipe
> A] flip_done timed out
> [   15.346934] [drm] Initialized i915 1.6.0 20201103 for 0000:00:03.0 on minor
> 0
> 
> I did a hackjob to track them down and just if out the offending code,
> which speeds up the boot by ~11 seconds but is probably dangerous as hell:

Hi, Christoph, what platform is this? And what's your guest i915 config?

I'll try to reproduce on our side. Thanks for reporting this.

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 2d5d21740c25..ee82fd67f386 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -10696,7 +10696,7 @@ static void intel_atomic_commit_tail(struct intel_atomic_state *state)
>  	 * - switch over to the vblank wait helper in the core after that since
>  	 *   we don't need out special handling any more.
>  	 */
> -	drm_atomic_helper_wait_for_flip_done(dev, &state->base);
> +//	drm_atomic_helper_wait_for_flip_done(dev, &state->base);
>  
>  	for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) {
>  		if (new_crtc_state->uapi.async_flip)
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 45fefa0ed160..f03ce729cc4b 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3753,7 +3753,7 @@ intel_disable_sagv(struct drm_i915_private *dev_priv)
>  	if (!intel_has_sagv(dev_priv))
>  		return 0;
>  
> -	if (dev_priv->sagv_status == I915_SAGV_DISABLED)
> +	if (1 || dev_priv->sagv_status == I915_SAGV_DISABLED)
>  		return 0;
>  
>  	drm_dbg_kms(&dev_priv->drm, "Disabling SAGV\n");

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  parent reply	other threads:[~2021-08-16  3:08 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-13  6:31 [Intel-gfx] i915 timeouts delaying boot under GVT Christoph Hellwig
2021-08-13  6:44 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2021-08-13  7:17 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-08-16  2:45 ` Zhenyu Wang [this message]
2021-08-16  6:21   ` [Intel-gfx] " Christoph Hellwig

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