From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Cc: <john.c.harrison@intel.com>
Subject: [Intel-gfx] [PATCH 5/5] drm/i915/guc: Use i915_gem_object_is_lmem in i915_gem_object_is_lmem
Date: Mon, 13 Sep 2021 21:49:33 -0700 [thread overview]
Message-ID: <20210914044933.22932-6-matthew.brost@intel.com> (raw)
In-Reply-To: <20210914044933.22932-1-matthew.brost@intel.com>
The GuC objects are perma-pinned and need to be dumped during an error
capture. Use the macro i915_gem_object_is_lmem rather than
__i915_gem_object_is_lmem to avoid a lockdep splat as the former is the
correct call if the object is perma-pinned.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Cc: Thomas Hellstrom <thellstrom@vmware.com>
---
drivers/gpu/drm/i915/i915_gpu_error.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index b9f66dbd46bb..a61e23deeb00 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1068,7 +1068,7 @@ i915_vma_coredump_create(const struct intel_gt *gt,
if (ret)
break;
}
- } else if (__i915_gem_object_is_lmem(vma->obj)) {
+ } else if (i915_gem_object_is_lmem(vma->obj)) {
struct intel_memory_region *mem = vma->obj->mm.region;
dma_addr_t dma;
--
2.32.0
next prev parent reply other threads:[~2021-09-14 4:54 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-14 4:49 [Intel-gfx] [PATCH 0/5] Enable GuC submission by default on DG1 Matthew Brost
2021-09-14 4:49 ` [Intel-gfx] [PATCH 1/5] drm/i915: Do not define vma on stack Matthew Brost
2021-09-14 5:04 ` Dave Airlie
2021-09-14 15:36 ` Matthew Brost
2021-09-14 20:05 ` Daniel Vetter
2021-09-14 21:10 ` Matthew Brost
2021-09-17 12:31 ` Daniel Vetter
2021-09-14 4:49 ` [Intel-gfx] [PATCH 2/5] drm/i915/guc: put all guc objects in lmem when available Matthew Brost
2021-09-14 4:49 ` [Intel-gfx] [PATCH 3/5] drm/i915/guc: Add DG1 GuC / HuC firmware defs Matthew Brost
2021-09-14 4:49 ` [Intel-gfx] [PATCH 4/5] drm/i915/guc: Enable GuC submission by default on DG1 Matthew Brost
2021-09-14 4:49 ` Matthew Brost [this message]
2021-09-14 5:35 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable GuC submission by default on DG1 (rev5) Patchwork
2021-09-14 6:01 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-09-14 16:00 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable GuC submission by default on DG1 (rev6) Patchwork
2021-09-14 16:24 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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