From: Lee Shawn C <shawn.c.lee@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Lee Shawn C <shawn.c.lee@intel.com>,
Jani Nikula <jani.nikula@linux.intel.com>,
Vandita Kulkarni <vandita.kulkarni@intel.com>,
Cooper Chiou <cooper.chiou@intel.com>,
William Tseng <william.tseng@intel.com>
Subject: [Intel-gfx] [PATCH] drm/i915/dsi: do not register gmbus if it was reserved for MIPI display
Date: Fri, 17 Sep 2021 12:35:37 +0800 [thread overview]
Message-ID: <20210917043537.4575-1-shawn.c.lee@intel.com> (raw)
In-Reply-To: <20210916102118.17356-1-shawn.c.lee@intel.com>
Gmbus driver would setup all Intel i2c GMBuses. But DDC bus
may configured as gpio and reserved for MIPI driver to control
panel power on/off sequence.
Using i2c tool to communicate to peripherals via i2c interface
reversed for gmbus(DDC). There will be some high/low pulse
appear on DDC SCL and SDA (might be host sent out i2c slave
address). MIPI panel would be impacted due to unexpected signal
then caused abnormal display or shut down issue.
v2: gmbus driver should not add i2c adapter for DDC interface
if LFP display was configured to support MIPI panel.
v3: fix sparse warning
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Cc: Vandita Kulkarni <vandita.kulkarni@intel.com>
Cc: Cooper Chiou <cooper.chiou@intel.com>
Cc: William Tseng <william.tseng@intel.com>
Signed-off-by: Lee Shawn C <shawn.c.lee@intel.com>
---
drivers/gpu/drm/i915/display/intel_gmbus.c | 18 +++++++++++++++++-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index ceb1bf8a8c3c..51d2b6bf2ed2 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -141,6 +141,21 @@ bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv,
return pin < size && get_gmbus_pin(dev_priv, pin)->name;
}
+static bool intel_gmbus_ddc_reserve_for_mipi(struct drm_i915_private *dev_priv,
+ unsigned int pin)
+{
+ if (intel_bios_is_dsi_present(dev_priv, NULL)) {
+ if (DISPLAY_VER(dev_priv) >= 11) {
+ if ((pin == GMBUS_PIN_2_BXT && dev_priv->vbt.dsi.config->dual_link) ||
+ pin == GMBUS_PIN_1_BXT) {
+ return true;
+ }
+ }
+ }
+
+ return false;
+}
+
/* Intel GPIO access functions */
#define I2C_RISEFALL_TIME 10
@@ -859,7 +874,8 @@ int intel_gmbus_setup(struct drm_i915_private *dev_priv)
init_waitqueue_head(&dev_priv->gmbus_wait_queue);
for (pin = 0; pin < ARRAY_SIZE(dev_priv->gmbus); pin++) {
- if (!intel_gmbus_is_valid_pin(dev_priv, pin))
+ if (!intel_gmbus_is_valid_pin(dev_priv, pin) ||
+ intel_gmbus_ddc_reserve_for_mipi(dev_priv, pin))
continue;
bus = &dev_priv->gmbus[pin];
--
2.17.1
next prev parent reply other threads:[~2021-09-17 4:31 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-16 10:21 [Intel-gfx] [PATCH] drm/i915/dsi: unregister gmbus if LFP display was MIPI panel Lee Shawn C
2021-09-16 10:32 ` Jani Nikula
2021-09-16 11:03 ` Lee, Shawn C
2021-09-16 11:12 ` Jani Nikula
2021-09-16 10:56 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2021-09-16 12:46 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-09-16 14:08 ` [Intel-gfx] [PATCH] drm/i915/dsi: do not register gmbus if it was reserved for MIPI display Lee Shawn C
2021-09-16 20:39 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: unregister gmbus if LFP display was MIPI panel (rev2) Patchwork
2021-09-16 20:39 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-16 21:03 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-17 0:43 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-17 4:35 ` Lee Shawn C [this message]
2021-09-17 10:59 ` [Intel-gfx] [PATCH] drm/i915/dsi: do not register gmbus if it was reserved for MIPI display Jani Nikula
2021-09-17 12:35 ` Lee, Shawn C
2021-09-17 4:38 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: unregister gmbus if LFP display was MIPI panel (rev3) Patchwork
2021-09-17 5:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-17 6:18 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-23 2:33 ` [Intel-gfx] [v4] drm/i915/dsi: do not register gmbus if it was reserved for MIPI display Lee Shawn C
2021-10-05 1:28 ` Lee, Shawn C
2021-09-23 3:01 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: unregister gmbus if LFP display was MIPI panel (rev4) Patchwork
2021-09-23 3:31 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-23 5:22 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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