Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Imre Deak <imre.deak@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "José Roberto de Souza" <jose.souza@intel.com>
Subject: [Intel-gfx] [PATCH v2 09/13] drm/i915/tc: Avoid using legacy AUX PW in TBT mode
Date: Wed, 29 Sep 2021 16:28:31 +0300	[thread overview]
Message-ID: <20210929132833.2253961-5-imre.deak@intel.com> (raw)
In-Reply-To: <20210921002313.1132357-10-imre.deak@intel.com>

For the ADL-P TBT mode the spec doesn't require blocking TC-cold by
using the legacy AUX power domain. To avoid the timeouts that this would
cause during PHY disconnect/reconnect sequences (which will be more
frequent after a follow-up change) use the TC_COLD_OFF power domain in
TBT mode on all platforms. On TGL this power domain blocks TC-cold via a
PUNIT command, while on other platforms the domain just takes a runtime
PM reference.

If the HPD live status indicates that the port mode needs to be reset
- for instance after switching from TBT to a DP-alt sink - still take
the AUX domain, since the IOM firmware handshake requires this.

v2: Rebased on v2 of the previous patch.

Cc: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/display/intel_tc.c | 55 ++++++++++++++++---------
 1 file changed, 36 insertions(+), 19 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_tc.c b/drivers/gpu/drm/i915/display/intel_tc.c
index 69c917fce03e4..2df4d0beb6368 100644
--- a/drivers/gpu/drm/i915/display/intel_tc.c
+++ b/drivers/gpu/drm/i915/display/intel_tc.c
@@ -59,10 +59,10 @@ bool intel_tc_cold_requires_aux_pw(struct intel_digital_port *dig_port)
 static enum intel_display_power_domain
 tc_cold_get_power_domain(struct intel_digital_port *dig_port, enum tc_port_mode mode)
 {
-	if (intel_tc_cold_requires_aux_pw(dig_port))
-		return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
-	else
+	if (mode == TC_PORT_TBT_ALT || !intel_tc_cold_requires_aux_pw(dig_port))
 		return POWER_DOMAIN_TC_COLD_OFF;
+
+	return intel_legacy_aux_to_power_domain(dig_port->aux_ch);
 }
 
 static intel_wakeref_t
@@ -645,6 +645,36 @@ static void intel_tc_port_reset_mode(struct intel_digital_port *dig_port,
 		    tc_port_mode_name(dig_port->tc_mode));
 }
 
+static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)
+{
+	return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode;
+}
+
+static void intel_tc_port_update_mode(struct intel_digital_port *dig_port,
+				      int required_lanes, bool force_disconnect)
+{
+	enum intel_display_power_domain domain;
+	intel_wakeref_t wref;
+	bool needs_reset = force_disconnect;
+
+	if (!needs_reset) {
+		/* Get power domain required to check the hotplug live status. */
+		wref = tc_cold_block(dig_port, &domain);
+		needs_reset = intel_tc_port_needs_reset(dig_port);
+		tc_cold_unblock(dig_port, domain, wref);
+	}
+
+	if (!needs_reset)
+		return;
+
+	/* Get power domain required for resetting the mode. */
+	wref = tc_cold_block_in_mode(dig_port, TC_PORT_DISCONNECTED, &domain);
+
+	intel_tc_port_reset_mode(dig_port, required_lanes, force_disconnect);
+
+	tc_cold_unblock(dig_port, domain, wref);
+}
+
 static void
 intel_tc_port_link_init_refcount(struct intel_digital_port *dig_port,
 				 int refcount)
@@ -691,11 +721,6 @@ void intel_tc_port_sanitize(struct intel_digital_port *dig_port)
 	mutex_unlock(&dig_port->tc_lock);
 }
 
-static bool intel_tc_port_needs_reset(struct intel_digital_port *dig_port)
-{
-	return intel_tc_port_get_target_mode(dig_port) != dig_port->tc_mode;
-}
-
 /*
  * The type-C ports are different because even when they are connected, they may
  * not be available/usable by the graphics driver: see the comment on
@@ -735,18 +760,10 @@ static void __intel_tc_port_lock(struct intel_digital_port *dig_port,
 
 	mutex_lock(&dig_port->tc_lock);
 
-	if (!dig_port->tc_link_refcount) {
-		enum intel_display_power_domain domain;
-		intel_wakeref_t tc_cold_wref;
 
-		tc_cold_wref = tc_cold_block(dig_port, &domain);
-
-		if (force_disconnect || intel_tc_port_needs_reset(dig_port))
-			intel_tc_port_reset_mode(dig_port, required_lanes,
-						 force_disconnect);
-
-		tc_cold_unblock(dig_port, domain, tc_cold_wref);
-	}
+	if (!dig_port->tc_link_refcount)
+		intel_tc_port_update_mode(dig_port, required_lanes,
+					  force_disconnect);
 
 	drm_WARN_ON(&i915->drm, dig_port->tc_lock_wakeref);
 	dig_port->tc_lock_wakeref = wakeref;
-- 
2.27.0


  parent reply	other threads:[~2021-09-29 13:29 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-21  0:23 [Intel-gfx] [PATCH 00/13] drm/i915/tc: Fix TypeC connect/disconnect sequences Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 01/13] drm/i915/tc: Fix TypeC port init/resume time sanitization Imre Deak
2021-09-23 23:10   ` Souza, Jose
2021-09-24 10:59     ` Jani Nikula
2021-09-24 11:06       ` Imre Deak
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-29 19:19     ` Souza, Jose
2021-09-21  0:23 ` [Intel-gfx] [PATCH 02/13] drm/i915/adlp/tc: Fix PHY connected check for Thunderbolt mode Imre Deak
2021-09-23 23:18   ` Souza, Jose
2021-09-24 15:24     ` Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 03/13] drm/i915/tc: Remove waiting for PHY complete during releasing ownership Imre Deak
2021-09-24  0:17   ` Souza, Jose
2021-09-21  0:23 ` [Intel-gfx] [PATCH 04/13] drm/i915/tc: Check for DP-alt, legacy sinks before taking PHY ownership Imre Deak
2021-09-24  0:30   ` Souza, Jose
2021-09-24 15:31     ` Imre Deak
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 05/13] drm/i915/tc: Add/use helpers to retrieve TypeC port properties Imre Deak
2021-09-24 19:54   ` Souza, Jose
2021-09-21  0:23 ` [Intel-gfx] [PATCH 06/13] drm/i915/tc: Don't keep legacy TypeC ports in connected state w/o a sink Imre Deak
2021-09-24 19:57   ` Souza, Jose
2021-09-21  0:23 ` [Intel-gfx] [PATCH 07/13] drm/i915/tc: Add a mode for the TypeC PHY's disconnected state Imre Deak
2021-09-27 21:16   ` Souza, Jose
2021-09-27 21:46     ` Imre Deak
2021-09-28 19:18       ` Souza, Jose
2021-09-28 19:34         ` Imre Deak
2021-09-28 19:45           ` Souza, Jose
2021-09-28 19:55             ` Imre Deak
2021-09-28 20:02               ` Souza, Jose
2021-09-28 20:08                 ` Imre Deak
2021-09-28 20:29                   ` Souza, Jose
2021-09-28 20:38                     ` Imre Deak
2021-09-28 20:56                       ` Souza, Jose
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 08/13] drm/i915/tc: Refactor TC-cold block/unblock helpers Imre Deak
2021-09-27 21:56   ` Souza, Jose
2021-09-27 22:13     ` Imre Deak
2021-09-27 22:21       ` Souza, Jose
2021-09-27 22:28         ` Imre Deak
2021-09-27 23:33           ` Souza, Jose
2021-09-27 23:51             ` Imre Deak
2021-09-28  0:14               ` Souza, Jose
2021-09-28  0:45                 ` Imre Deak
2021-09-28  1:03                   ` Souza, Jose
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 09/13] drm/i915/tc: Avoid using legacy AUX PW in TBT mode Imre Deak
2021-09-28 20:31   ` Souza, Jose
2021-09-29 13:28   ` Imre Deak [this message]
2021-09-21  0:23 ` [Intel-gfx] [PATCH 10/13] drm/i915/icl/tc: Remove the ICL special casing during TC-cold blocking Imre Deak
2021-09-27 22:02   ` Souza, Jose
2021-09-28 10:52     ` Imre Deak
2021-09-28 20:50       ` Souza, Jose
2021-09-21  0:23 ` [Intel-gfx] [PATCH 11/13] drm/i915/tc: Fix TypeC PHY connect/disconnect logic on ADL-P Imre Deak
2021-09-28 20:51   ` Souza, Jose
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-21  0:23 ` [Intel-gfx] [PATCH 12/13] drm/i915/tc: Drop extra TC cold blocking from intel_tc_port_connected() Imre Deak
2021-09-28 20:51   ` Souza, Jose
2021-09-21  0:23 ` [Intel-gfx] [PATCH 13/13] drm/i915/tc: Fix system hang on ADL-P during TypeC PHY disconnect Imre Deak
2021-09-28 20:55   ` Souza, Jose
2021-09-29 13:28   ` [Intel-gfx] [PATCH v2 " Imre Deak
2021-09-21  0:30 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Fix TypeC connect/disconnect sequences Patchwork
2021-09-21  0:32 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-21  1:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-21  3:01 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-09-29 13:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Fix TypeC connect/disconnect sequences (rev8) Patchwork
2021-09-29 13:43 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-29 14:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-29 16:58 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-29 21:16   ` Imre Deak
2021-09-29 22:23     ` Vudum, Lakshminarayana
2021-09-29 21:47 ` Patchwork
2021-09-29 21:54 ` Patchwork
2021-09-29 22:21 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210929132833.2253961-5-imre.deak@intel.com \
    --to=imre.deak@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=jose.souza@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox