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From: Sean Paul <sean@poorly.run>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	freedreno@lists.freedesktop.org
Cc: swboyd@chromium.org, jani.nikula@linux.intel.com,
	Sean Paul <seanpaul@chromium.org>,
	Jani Nikula <jani.nikula@intel.com>,
	Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
	Rodrigo Vivi <rodrigo.vivi@intel.com>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Subject: [Intel-gfx] [PATCH v3 05/14] drm/i915/hdcp: Consolidate HDCP setup/state cache
Date: Fri,  1 Oct 2021 11:11:34 -0400	[thread overview]
Message-ID: <20211001151145.55916-6-sean@poorly.run> (raw)
In-Reply-To: <20211001151145.55916-1-sean@poorly.run>

From: Sean Paul <seanpaul@chromium.org>

Stick all of the setup for HDCP into a dedicated function. No functional
change, but this will facilitate moving HDCP logic into helpers.

Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210913175747.47456-6-sean@poorly.run #v1
Link: https://patchwork.freedesktop.org/patch/msgid/20210915203834.1439-6-sean@poorly.run #v2

Changes in v2:
-None
Changes in v3:
-None
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 52 +++++++++++++++--------
 1 file changed, 35 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index feebafead046..af166baf8c71 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -2167,6 +2167,37 @@ static enum mei_fw_tc intel_get_mei_fw_tc(enum transcoder cpu_transcoder)
 	}
 }
 
+static int
+_intel_hdcp_setup(struct intel_connector *connector,
+		  const struct intel_crtc_state *pipe_config, u8 content_type)
+{
+	struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
+	struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
+	struct intel_hdcp *hdcp = &connector->hdcp;
+	int ret = 0;
+
+	if (!connector->encoder) {
+		drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
+			connector->base.name, connector->base.base.id);
+		return -ENODEV;
+	}
+
+	hdcp->content_type = content_type;
+
+	if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
+		hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
+		hdcp->stream_transcoder = pipe_config->cpu_transcoder;
+	} else {
+		hdcp->cpu_transcoder = pipe_config->cpu_transcoder;
+		hdcp->stream_transcoder = INVALID_TRANSCODER;
+	}
+
+	if (DISPLAY_VER(dev_priv) >= 12)
+		dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
+
+	return ret;
+}
+
 static int initialize_hdcp_port_data(struct intel_connector *connector,
 				     struct intel_digital_port *dig_port,
 				     const struct intel_hdcp_shim *shim)
@@ -2306,28 +2337,14 @@ int intel_hdcp_enable(struct intel_connector *connector,
 	if (!hdcp->shim)
 		return -ENOENT;
 
-	if (!connector->encoder) {
-		drm_err(&dev_priv->drm, "[%s:%d] encoder is not initialized\n",
-			connector->base.name, connector->base.base.id);
-		return -ENODEV;
-	}
-
 	mutex_lock(&hdcp->mutex);
 	mutex_lock(&dig_port->hdcp_mutex);
 	drm_WARN_ON(&dev_priv->drm,
 		    hdcp->value == DRM_MODE_CONTENT_PROTECTION_ENABLED);
-	hdcp->content_type = content_type;
-
-	if (intel_crtc_has_type(pipe_config, INTEL_OUTPUT_DP_MST)) {
-		hdcp->cpu_transcoder = pipe_config->mst_master_transcoder;
-		hdcp->stream_transcoder = pipe_config->cpu_transcoder;
-	} else {
-		hdcp->cpu_transcoder = pipe_config->cpu_transcoder;
-		hdcp->stream_transcoder = INVALID_TRANSCODER;
-	}
 
-	if (DISPLAY_VER(dev_priv) >= 12)
-		dig_port->hdcp_port_data.fw_tc = intel_get_mei_fw_tc(hdcp->cpu_transcoder);
+	ret = _intel_hdcp_setup(connector, pipe_config, content_type);
+	if (ret)
+		goto out;
 
 	/*
 	 * Considering that HDCP2.2 is more secure than HDCP1.4, If the setup
@@ -2355,6 +2372,7 @@ int intel_hdcp_enable(struct intel_connector *connector,
 					true);
 	}
 
+out:
 	mutex_unlock(&dig_port->hdcp_mutex);
 	mutex_unlock(&hdcp->mutex);
 	return ret;
-- 
Sean Paul, Software Engineer, Google / Chromium OS


  parent reply	other threads:[~2021-10-01 15:12 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-01 15:11 [Intel-gfx] [PATCH v3 00/14] drm/hdcp: Pull HDCP auth/exchange/check into helpers Sean Paul
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 01/14] drm/hdcp: Add drm_hdcp_atomic_check() Sean Paul
2021-10-22 21:08   ` [Intel-gfx] [Freedreno] " abhinavk
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 02/14] drm/hdcp: Avoid changing crtc state in hdcp atomic check Sean Paul
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 03/14] drm/hdcp: Update property value on content type and user changes Sean Paul
2021-10-05  0:03   ` [Intel-gfx] [Freedreno] " abhinavk
2021-10-22 21:08   ` abhinavk
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 04/14] drm/hdcp: Expand HDCP helper library for enable/disable/check Sean Paul
2021-10-22 21:14   ` [Intel-gfx] [Freedreno] " abhinavk
2021-10-01 15:11 ` Sean Paul [this message]
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 06/14] drm/i915/hdcp: Retain hdcp_capable return codes Sean Paul
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 07/14] drm/i915/hdcp: Use HDCP helpers for i915 Sean Paul
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 08/14] drm/msm/dpu_kms: Re-order dpu includes Sean Paul
2021-10-04 22:48   ` Dmitry Baryshkov
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 09/14] drm/msm/dpu: Remove useless checks in dpu_encoder Sean Paul
2021-10-04 22:49   ` Dmitry Baryshkov
2021-10-22 21:10   ` [Intel-gfx] [Freedreno] " abhinavk
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 10/14] drm/msm/dpu: Remove encoder->enable() hack Sean Paul
2021-10-04 22:52   ` Dmitry Baryshkov
2021-10-22 21:06   ` abhinavk
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 11/14] drm/msm/dp: Re-order dp_audio_put in deinit_sub_modules Sean Paul
2021-10-04 22:52   ` Dmitry Baryshkov
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 12/14] dt-bindings: msm/dp: Add bindings for HDCP registers Sean Paul
2021-10-01 19:03   ` Rob Herring
2021-10-04 19:58   ` Bjorn Andersson
2021-10-29 14:21     ` Sean Paul
2021-10-04 20:00   ` Bjorn Andersson
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 13/14] arm64: dts: qcom: sc7180: Add support for HDCP in dp-controller Sean Paul
2021-10-01 15:11 ` [Intel-gfx] [PATCH v3 14/14] drm/msm: Implement HDCP 1.x using the new drm HDCP helpers Sean Paul
2021-10-01 20:58 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/hdcp: Pull HDCP auth/exchange/check into helpers (rev2) Patchwork

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