From: Matthew Brost <matthew.brost@intel.com>
To: <intel-gfx@lists.freedesktop.org>, <dri-devel@lists.freedesktop.org>
Cc: <john.c.harrison@intel.com>, <thomas.hellstrom@linux.intel.com>
Subject: [Intel-gfx] [PATCH] drm/i915/selftests: Skip hangcheck selftest on DG1
Date: Mon, 11 Oct 2021 12:40:31 -0700 [thread overview]
Message-ID: <20211011194031.16502-1-matthew.brost@intel.com> (raw)
The hangcheck selftest blows on DG1 CI and aborts the BAT run.
Investigation is underway to root cause the failure but in the meantime
disable to this test on DG1 to unblock CI.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
index 7e2d99dd012d..e2115afbd073 100644
--- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
+++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c
@@ -2018,6 +2018,14 @@ int intel_hangcheck_live_selftests(struct drm_i915_private *i915)
intel_wakeref_t wakeref;
int err;
+ /*
+ * FIXME: This test is blowing up in CI on DG1 due to engine resets
+ * sporadically timing out. Investigation to root cause this under way.
+ * In the meantime skip this test to unblock CI.
+ */
+ if (IS_DG1(i915))
+ return 0;
+
if (!intel_has_gpu_reset(gt))
return 0;
--
2.32.0
next reply other threads:[~2021-10-11 19:45 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-11 19:40 Matthew Brost [this message]
2021-10-11 23:12 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/selftests: Skip hangcheck selftest on DG1 Patchwork
2021-10-12 3:41 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-10-21 5:45 ` [Intel-gfx] [PATCH] " Thomas Hellström
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